From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39185) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQbig-0004bx-Am for qemu-devel@nongnu.org; Wed, 06 Jun 2018 12:55:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fQbie-0003xF-4i for qemu-devel@nongnu.org; Wed, 06 Jun 2018 12:55:34 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:53804 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fQbid-0003wv-QJ for qemu-devel@nongnu.org; Wed, 06 Jun 2018 12:55:31 -0400 From: =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= Date: Wed, 6 Jun 2018 17:55:26 +0100 Message-Id: <20180606165527.17365-3-berrange@redhat.com> In-Reply-To: <20180606165527.17365-1-berrange@redhat.com> References: <20180606165527.17365-1-berrange@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 2/3] i386: improve sorting of CPU model names List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Eduardo Habkost , Richard Henderson , =?UTF-8?q?Daniel=20P=2E=20Berrang=C3=A9?= The current list of CPU model names output by "-cpu help" is sorted alphabetically based on the internal QOM class name. The text that is displayed, however, uses the CPU model name, which is equivalent to the QOM class name, minus a suffix. Unfortunately that suffix has an effect on the sort ordering, for example, causing the various Broadwell variants to appear reversed: x86 486 x86 Broadwell-IBRS Intel Core Processor (Broadwell, IBRS) x86 Broadwell-noTSX-IBRS Intel Core Processor (Broadwell, no TSX, IBRS x86 Broadwell-noTSX Intel Core Processor (Broadwell, no TSX) x86 Broadwell Intel Core Processor (Broadwell) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) By sorting on the actual CPU model name text that is displayed, the result is x86 486 x86 Broadwell Intel Core Processor (Broadwell) x86 Broadwell-IBRS Intel Core Processor (Broadwell, IBRS) x86 Broadwell-noTSX Intel Core Processor (Broadwell, no TSX) x86 Broadwell-noTSX-IBRS Intel Core Processor (Broadwell, no TSX, IBRS= ) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) This requires extra string allocations during sorting, but this is not a concern given the usage scenario and the number of CPU models that exist. Signed-off-by: Daniel P. Berrang=C3=A9 --- target/i386/cpu.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index aa4d9949b4..cb074082b3 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -3177,15 +3177,19 @@ static gint x86_cpu_list_compare(gconstpointer a,= gconstpointer b) ObjectClass *class_b =3D (ObjectClass *)b; X86CPUClass *cc_a =3D X86_CPU_CLASS(class_a); X86CPUClass *cc_b =3D X86_CPU_CLASS(class_b); - const char *name_a, *name_b; + char *name_a, *name_b; + int ret; =20 if (cc_a->ordering !=3D cc_b->ordering) { - return cc_a->ordering - cc_b->ordering; + ret =3D cc_a->ordering - cc_b->ordering; } else { - name_a =3D object_class_get_name(class_a); - name_b =3D object_class_get_name(class_b); - return strcmp(name_a, name_b); + name_a =3D x86_cpu_class_get_model_name(cc_a); + name_b =3D x86_cpu_class_get_model_name(cc_b); + ret =3D strcmp(name_a, name_b); + g_free(name_a); + g_free(name_b); } + return ret; } =20 static GSList *get_sorted_cpu_model_list(void) --=20 2.17.0