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From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>,
	Riku Voipio <riku.voipio@iki.fi>,
	Richard Henderson <richard.henderson@linaro.org>
Subject: [Qemu-devel] [PULL 1/9] target/m68k: Use DISAS_NORETURN for exceptions
Date: Mon, 11 Jun 2018 12:49:27 +0200	[thread overview]
Message-ID: <20180611104935.20499-2-laurent@vivier.eu> (raw)
In-Reply-To: <20180611104935.20499-1-laurent@vivier.eu>

From: Richard Henderson <richard.henderson@linaro.org>

The raise_exception helper does not return.  Do not generate
any code following that.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20180512050250.12774-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target/m68k/translate.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 4b5dbdb51c..de1be58f65 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -291,18 +291,18 @@ static void gen_jmp(DisasContext *s, TCGv dest)
     s->is_jmp = DISAS_JUMP;
 }
 
-static void gen_raise_exception(int nr)
+static void gen_exception(DisasContext *s, uint32_t dest, int nr)
 {
-    TCGv_i32 tmp = tcg_const_i32(nr);
+    TCGv_i32 tmp;
 
+    update_cc_op(s);
+    tcg_gen_movi_i32(QREG_PC, dest);
+
+    tmp = tcg_const_i32(nr);
     gen_helper_raise_exception(cpu_env, tmp);
     tcg_temp_free_i32(tmp);
-}
 
-static void gen_exception(DisasContext *s, uint32_t where, int nr)
-{
-    gen_jmp_im(s, where);
-    gen_raise_exception(nr);
+    s->is_jmp = DISAS_NORETURN;
 }
 
 static inline void gen_addr_fault(DisasContext *s)
@@ -6106,7 +6106,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
 
         if (unlikely(cpu_breakpoint_test(cs, dc->pc, BP_ANY))) {
             gen_exception(dc, dc->pc, EXCP_DEBUG);
-            dc->is_jmp = DISAS_JUMP;
             /* The address covered by the breakpoint must be included in
                [tb->pc, tb->pc + tb->size) in order to for it to be
                properly cleared -- thus we increment the PC here so that
@@ -6150,6 +6149,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
             tcg_gen_exit_tb(NULL, 0);
             break;
         case DISAS_TB_JUMP:
+        case DISAS_NORETURN:
             /* nothing more to generate */
             break;
         }
-- 
2.14.4

  reply	other threads:[~2018-06-11 10:50 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-11 10:49 [Qemu-devel] [PULL 0/9] M68k for 3.0 patches Laurent Vivier
2018-06-11 10:49 ` Laurent Vivier [this message]
2018-06-11 10:49 ` [Qemu-devel] [PULL 2/9] target/m68k: Replace DISAS_TB_JUMP with DISAS_NORETURN Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 3/9] target/m68k: Remove DISAS_JUMP_NEXT as unused Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 4/9] target/m68k: Use lookup_and_goto_tb for DISAS_JUMP Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 5/9] target/m68k: Rename DISAS_UPDATE and gen_lookup_tb Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 6/9] target/m68k: Convert to DisasContextBase Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 7/9] target/m68k: Convert to TranslatorOps Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 8/9] target/m68k: Improve ending TB at page boundaries Laurent Vivier
2018-06-11 10:49 ` [Qemu-devel] [PULL 9/9] target/m68k: Merge disas_m68k_insn into m68k_tr_translate_insn Laurent Vivier
2018-06-11 12:37 ` [Qemu-devel] [PULL 0/9] M68k for 3.0 patches Peter Maydell

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