From: "Alex Bennée" <alex.bennee@linaro.org>
To: peter.maydell@linaro.org
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
richard.henderson@linaro.org,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [RISU PATCH v3 00/22] SVE support and various misc fixes
Date: Wed, 13 Jun 2018 13:55:39 +0100 [thread overview]
Message-ID: <20180613125601.14371-1-alex.bennee@linaro.org> (raw)
Hi,
The core concept of the code hasn't changed much but I've done some
restructuring so we can still use an SVE enabled binary to run our
existing tests without having to regenerate everything. I've folded a
bunch of Richard's fixes into the relevant patches and also split some
patches up that make sense on their own. The code is also now smarter
about only worrying about SVE or SIMD to save on duplicating effort.
Thee are also a smattering of misc fixes for the build system, headers
and adding more feedback into help.
There are perhaps more #ifdef SVE_MAGIC's than I'd like but overall
I'm pretty happy with it. My main problem now is making sure I
generate patterns for an exhaustive coverage of the SVE instruction
set that we can fully exercise everything. Manually adding stuff to
aarch64.risu is more than a little error prone.
Alex Bennée (16):
risu_reginfo_aarch64: include signal.h for FPSIMD_MAGIC
comms: include header for writev
build-all-arches: expand the range of docker images
build-all-arches: do a distclean $(SRC) configured
risu: add zlib indication to help text
Makefile: include risu_reginfo_$(ARCH) in HDRS
risugen: add --sve support
contrib/generate_all.sh: allow passing of arguments to risugen
risu: move optional args to each architecture
risu_reginfo_aarch64: drop stray ;
risu_reginfo_aarch64: unionify VFP regs
risu_reginfo: introduce reginfo_size()
risu_reginfo_aarch64: left justify regnums and drop masks
risu_reginfo_aarch64: add support for copying SVE register state
risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatch
risu_reginfo_aarch64: handle variable VQ
Richard Henderson (6):
risugen: Initialize sve predicates with random data
risugen: use fewer insns for aarch64 immediate load
risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpers
risugen: add dtype_msz address helper
risu: add process_arch_opt
risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture
Makefile | 5 +-
build-all-archs | 12 +-
comms.c | 1 +
contrib/generate_all.sh | 14 +-
reginfo.c | 6 +-
risu.c | 51 ++++---
risu.h | 12 +-
risu_reginfo_aarch64.c | 288 ++++++++++++++++++++++++++++++++++++----
risu_reginfo_aarch64.h | 31 ++++-
risu_reginfo_arm.c | 22 +++
risu_reginfo_m68k.c | 14 ++
risu_reginfo_ppc64.c | 14 ++
risugen | 3 +
risugen_arm.pm | 243 ++++++++++++++++++++++++++++++---
14 files changed, 639 insertions(+), 77 deletions(-)
--
2.17.1
next reply other threads:[~2018-06-13 12:56 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-13 12:55 Alex Bennée [this message]
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 01/22] risu_reginfo_aarch64: include signal.h for FPSIMD_MAGIC Alex Bennée
2018-06-14 5:40 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 02/22] comms: include header for writev Alex Bennée
2018-06-14 5:41 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 03/22] build-all-arches: expand the range of docker images Alex Bennée
2018-06-14 5:42 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 04/22] build-all-arches: do a distclean $(SRC) configured Alex Bennée
2018-06-14 5:43 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 05/22] risu: add zlib indication to help text Alex Bennée
2018-06-14 5:47 ` Richard Henderson
2018-06-14 8:34 ` Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 06/22] Makefile: include risu_reginfo_$(ARCH) in HDRS Alex Bennée
2018-06-14 5:50 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 07/22] risugen: add --sve support Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 08/22] risugen: Initialize sve predicates with random data Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 09/22] risugen: use fewer insns for aarch64 immediate load Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 10/22] risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpers Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 11/22] risugen: add dtype_msz address helper Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 12/22] contrib/generate_all.sh: allow passing of arguments to risugen Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 13/22] risu: move optional args to each architecture Alex Bennée
2018-06-14 20:20 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 14/22] risu: add process_arch_opt Alex Bennée
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 15/22] risu_reginfo_aarch64: drop stray ; Alex Bennée
2018-06-14 20:23 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 16/22] risu_reginfo_aarch64: unionify VFP regs Alex Bennée
2018-06-14 20:24 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 17/22] risu_reginfo: introduce reginfo_size() Alex Bennée
2018-06-14 20:25 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 18/22] risu_reginfo_aarch64: left justify regnums and drop masks Alex Bennée
2018-06-14 20:26 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 19/22] risu_reginfo_aarch64: add support for copying SVE register state Alex Bennée
2018-06-14 20:33 ` Richard Henderson
2018-06-13 12:55 ` [Qemu-devel] [RISU PATCH v3 20/22] risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatch Alex Bennée
2018-06-14 20:42 ` Richard Henderson
2018-06-13 12:56 ` [Qemu-devel] [RISU PATCH v3 21/22] risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture Alex Bennée
2018-06-13 12:56 ` [Qemu-devel] [RISU PATCH v3 22/22] risu_reginfo_aarch64: handle variable VQ Alex Bennée
2018-06-14 20:50 ` Richard Henderson
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