From: Eduardo Habkost <ehabkost@redhat.com>
To: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: kvm@vger.kernel.org, qemu-devel@nongnu.org, pbonzini@redhat.com,
rth@twiddle.net
Subject: Re: [Qemu-devel] [PATCH QEMU] Patches for new AMD CPU bits.
Date: Wed, 13 Jun 2018 18:38:58 -0300 [thread overview]
Message-ID: <20180613213858.GI24764@localhost.localdomain> (raw)
In-Reply-To: <20180601153809.15259-1-konrad.wilk@oracle.com>
On Fri, Jun 01, 2018 at 11:38:07AM -0400, Konrad Rzeszutek Wilk wrote:
> Hi!
>
>
> I was reading the AMD whitepaper on SSBD and noticed that they have added
> two new bits in the 8000_0008 CPUID. EBX:
> 1) Bit[26] - similar to Intel's SSB_NO not needed anymore.
> 2) Bit[24] - use SPEC_CTRL MSR (0x48) instead of VIRT SPEC_CTRL MSR
> (0xC001_011f).
>
> See 124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
> A copy of this document is available at
> https://bugzilla.kernel.org/show_bug.cgi?id=199889
>
> These two patches along with the kernel ones allow us to expose those
> two bits to the guest.
Queued on x86-next, thanks!
--
Eduardo
prev parent reply other threads:[~2018-06-13 21:39 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20180601145921.9500-1-konrad.wilk@oracle.com>
2018-06-01 15:38 ` [Qemu-devel] [PATCH QEMU] Patches for new AMD CPU bits Konrad Rzeszutek Wilk
2018-06-01 15:38 ` [Qemu-devel] [PATCH 1/2] i386: define the AMD 'amd-ssbd' CPUID feature bit Konrad Rzeszutek Wilk
2018-06-04 8:54 ` Daniel P. Berrangé
2018-06-04 20:20 ` Konrad Rzeszutek Wilk
2018-06-04 20:07 ` Eduardo Habkost
2018-06-04 20:22 ` Konrad Rzeszutek Wilk
2018-06-04 21:15 ` Eduardo Habkost
2018-06-05 21:40 ` Konrad Rzeszutek Wilk
2018-06-13 10:19 ` Daniel P. Berrangé
2018-06-13 16:09 ` Konrad Rzeszutek Wilk
2018-06-13 16:21 ` Daniel P. Berrangé
2018-06-13 16:34 ` Konrad Rzeszutek Wilk
2018-06-13 16:39 ` Daniel P. Berrangé
2018-06-13 16:56 ` Eduardo Habkost
2018-06-05 13:31 ` Tom Lendacky
2018-06-05 14:04 ` Daniel P. Berrangé
2018-06-06 14:20 ` Daniel P. Berrangé
2018-06-08 21:22 ` Tom Lendacky
2018-06-01 15:38 ` [Qemu-devel] [PATCH 2/2] i386: Define AMD's no SSB mitigation needed Konrad Rzeszutek Wilk
2018-06-13 21:38 ` Eduardo Habkost [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180613213858.GI24764@localhost.localdomain \
--to=ehabkost@redhat.com \
--cc=konrad.wilk@oracle.com \
--cc=kvm@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).