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From: David Gibson <david@gibson.dropbear.id.au>
To: BALATON Zoltan <balaton@eik.bme.hu>, h@umbus.fritz.box
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	Alexander Graf <agraf@suse.de>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v3 6/9] sm501: Do not clear read only bits when writing registers
Date: Thu, 14 Jun 2018 11:33:06 +1000	[thread overview]
Message-ID: <20180614013306.GC3042@umbus.fritz.box> (raw)
In-Reply-To: <7a407b15b683417745e71a95452d5094e6e9fe94.1528935420.git.balaton@eik.bme.hu>

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On Thu, Jun 14, 2018 at 02:17:00AM +0200, BALATON Zoltan wrote:
> When writing registers that have read only bits we have to avoid
> changing these bits as they may have non zero values. Make sure we use
> the correct masks to mask out read only and reserved bits when
> changing registers.
> 
> Also remove extra spaces from dram_control and arbitration_control
> assignments.
> 
> Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> ---
> v3: Not only preserve read only bits but also allow clearing r/w
> bits

Applied to ppc-for-3.0, thanks.

> 
>  hw/display/sm501.c | 15 +++++++++------
>  1 file changed, 9 insertions(+), 6 deletions(-)
> 
> diff --git a/hw/display/sm501.c b/hw/display/sm501.c
> index e47be99..ca0840f 100644
> --- a/hw/display/sm501.c
> +++ b/hw/display/sm501.c
> @@ -836,27 +836,30 @@ static void sm501_system_config_write(void *opaque, hwaddr addr,
>  
>      switch (addr) {
>      case SM501_SYSTEM_CONTROL:
> -        s->system_control = value & 0xE300B8F7;
> +        s->system_control &= 0x10DB0000;
> +        s->system_control |= value & 0xEF00B8F7;
>          break;
>      case SM501_MISC_CONTROL:
> -        s->misc_control = value & 0xFF7FFF20;
> +        s->misc_control &= 0xEF;
> +        s->misc_control |= value & 0xFF7FFF10;
>          break;
>      case SM501_GPIO31_0_CONTROL:
>          s->gpio_31_0_control = value;
>          break;
>      case SM501_GPIO63_32_CONTROL:
> -        s->gpio_63_32_control = value;
> +        s->gpio_63_32_control = value & 0xFF80FFFF;
>          break;
>      case SM501_DRAM_CONTROL:
>          s->local_mem_size_index = (value >> 13) & 0x7;
>          /* TODO : check validity of size change */
> -        s->dram_control |=  value & 0x7FFFFFC3;
> +        s->dram_control &= 0x80000000;
> +        s->dram_control |= value & 0x7FFFFFC3;
>          break;
>      case SM501_ARBTRTN_CONTROL:
> -        s->arbitration_control =  value & 0x37777777;
> +        s->arbitration_control = value & 0x37777777;
>          break;
>      case SM501_IRQ_MASK:
> -        s->irq_mask = value;
> +        s->irq_mask = value & 0xFFDF3F5F;
>          break;
>      case SM501_MISC_TIMING:
>          s->misc_timing = value & 0xF31F1FFF;

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2018-06-14  2:58 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-14  0:17 [Qemu-devel] [PATCH v3 0/9] Misc sam460ex improvements BALATON Zoltan
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 6/9] sm501: Do not clear read only bits when writing registers BALATON Zoltan
2018-06-14  1:33   ` David Gibson [this message]
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 5/9] sam460ex: Add RTC device BALATON Zoltan
2018-06-14  1:36   ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 8/9] sm501: Perform a full update after palette change BALATON Zoltan
2018-06-14  1:35   ` David Gibson
2018-06-14  8:00     ` BALATON Zoltan
2018-06-14 12:42       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 7/9] sm501: Implement i2c part for reading monitor EDID BALATON Zoltan
2018-06-14  1:35   ` David Gibson
2018-06-14  8:06     ` BALATON Zoltan
2018-06-18  1:06       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 4/9] hw/timer: Add basic M41T80 emulation BALATON Zoltan
2018-06-14  1:36   ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 2/9] ppc4xx_i2c: Implement directcntl register BALATON Zoltan
2018-06-14  1:17   ` David Gibson
2018-06-14  7:51     ` BALATON Zoltan
2018-06-18  0:58       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 9/9] target/ppc: Add missing opcode for icbt on PPC440 BALATON Zoltan
2018-06-14  1:36   ` David Gibson
2018-06-14  8:03     ` BALATON Zoltan
2018-06-14 12:43       ` David Gibson
2018-06-15  9:35         ` BALATON Zoltan
2018-06-18  1:03           ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 1/9] ppc4xx_i2c: Remove unimplemented sdata and intr registers BALATON Zoltan
2018-06-14  1:14   ` David Gibson
2018-06-14  8:18     ` BALATON Zoltan
2018-06-15  5:27       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 3/9] ppc4xx_i2c: Rewrite to model hardware more closely BALATON Zoltan

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