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From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/6] ppc/pnv: move the details of the ISA bus creation under the LPC model
Date: Fri, 15 Jun 2018 12:41:26 +1000	[thread overview]
Message-ID: <20180615024126.GK4129@umbus.fritz.box> (raw)
In-Reply-To: <20180614140043.9231-3-clg@kaod.org>

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On Thu, Jun 14, 2018 at 04:00:39PM +0200, Cédric Le Goater wrote:
> This is a small cleanup to hide to the machine the gory details of the
> creation of the ISA bus. When time comes, the 'qemu_irq_handler' should
> become a LPC controller class attribute.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  include/hw/ppc/pnv_lpc.h |  3 +--
>  hw/ppc/pnv.c             | 15 +--------------
>  hw/ppc/pnv_lpc.c         | 24 ++++++++++++++++++++----
>  3 files changed, 22 insertions(+), 20 deletions(-)
> 
> diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
> index fddcb1c054b3..fb4b7b83d798 100644
> --- a/include/hw/ppc/pnv_lpc.h
> +++ b/include/hw/ppc/pnv_lpc.h
> @@ -72,7 +72,6 @@ typedef struct PnvLpcController {
>      bool   primary;
>  } PnvLpcController;
>  
> -qemu_irq *pnv_lpc_isa_irq_create(PnvLpcController *lpc, int chip_type,
> -                                 int nirqs);
> +ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, int chip_type);
>  
>  #endif /* _PPC_PNV_LPC_H */
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index b419d3323100..d2126ee4affc 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -521,22 +521,9 @@ static void pnv_reset(void)
>  
>  static ISABus *pnv_isa_create(PnvChip *chip)
>  {
> -    PnvLpcController *lpc = &chip->lpc;
> -    ISABus *isa_bus;
> -    qemu_irq *irqs;
>      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
>  
> -    /* let isa_bus_new() create its own bridge on SysBus otherwise
> -     * devices speficied on the command line won't find the bus and
> -     * will fail to create.
> -     */
> -    isa_bus = isa_bus_new(NULL, &lpc->isa_mem, &lpc->isa_io,
> -                          &error_fatal);
> -
> -    irqs = pnv_lpc_isa_irq_create(lpc, pcc->chip_type, ISA_NUM_IRQS);
> -
> -    isa_bus_irqs(isa_bus, irqs);
> -    return isa_bus;
> +    return pnv_lpc_isa_create(&chip->lpc, pcc->chip_type);
>  }

This 1-line wrapper doesn't look useful.  Why not just call
pnv_lpc_isa_create() from this thing's caller?

>  
>  static void pnv_init(MachineState *machine)
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index 1e70c8c19d52..7c6c012d5176 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -22,6 +22,7 @@
>  #include "target/ppc/cpu.h"
>  #include "qapi/error.h"
>  #include "qemu/log.h"
> +#include "hw/isa/isa.h"
>  
>  #include "hw/ppc/pnv.h"
>  #include "hw/ppc/pnv_lpc.h"
> @@ -546,16 +547,31 @@ static void pnv_lpc_isa_irq_handler(void *opaque, int n, int level)
>      }
>  }
>  
> -qemu_irq *pnv_lpc_isa_irq_create(PnvLpcController *lpc, int chip_type,
> -                                 int nirqs)
> +ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, int chip_type)
>  {
> +    ISABus *isa_bus;
> +    qemu_irq *irqs;
> +    qemu_irq_handler handler;
> +
> +    /* let isa_bus_new() create its own bridge on SysBus otherwise
> +     * devices speficied on the command line won't find the bus and
> +     * will fail to create.
> +     */
> +    isa_bus = isa_bus_new(NULL, &lpc->isa_mem, &lpc->isa_io,
> +                          &error_fatal);
> +
>      /* Not all variants have a working serial irq decoder. If not,
>       * handling of LPC interrupts becomes a platform issue (some
>       * platforms have a CPLD to do it).
>       */
>      if (chip_type == PNV_CHIP_POWER8NVL) {
> -        return qemu_allocate_irqs(pnv_lpc_isa_irq_handler, lpc, nirqs);
> +        handler = pnv_lpc_isa_irq_handler;
>      } else {
> -        return qemu_allocate_irqs(pnv_lpc_isa_irq_handler_cpld, lpc, nirqs);
> +        handler = pnv_lpc_isa_irq_handler_cpld;
>      }
> +
> +    irqs = qemu_allocate_irqs(handler, lpc, ISA_NUM_IRQS);
> +
> +    isa_bus_irqs(isa_bus, irqs);
> +    return isa_bus;
>  }

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2018-06-15  2:41 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-14 14:00 [Qemu-devel] [PATCH 0/6] ppc/pnv: new Pnv8Chip and Pnv9Chip models Cédric Le Goater
2018-06-14 14:00 ` [Qemu-devel] [PATCH 1/6] ppc/pnv: introduce a 'primary' field under the LPC model Cédric Le Goater
2018-06-15  2:38   ` David Gibson
2018-06-15 13:40     ` Cédric Le Goater
2018-06-14 14:00 ` [Qemu-devel] [PATCH 2/6] ppc/pnv: move the details of the ISA bus creation " Cédric Le Goater
2018-06-15  2:41   ` David Gibson [this message]
2018-06-14 14:00 ` [Qemu-devel] [PATCH 3/6] ppc/pnv: introduce an 'isa_bus_name' field " Cédric Le Goater
2018-06-15  2:47   ` David Gibson
2018-06-14 14:00 ` [Qemu-devel] [PATCH 4/6] ppc/pnv: introduce a pnv_chip_core_realize() routine Cédric Le Goater
2018-06-15  2:52   ` David Gibson
2018-06-14 14:00 ` [Qemu-devel] [PATCH 5/6] ppc/pnv: introduce a new intc_create() operation to the chip model Cédric Le Goater
2018-06-15  2:55   ` David Gibson
2018-06-14 14:00 ` [Qemu-devel] [PATCH 6/6] ppc/pnv: introduce Pnv8Chip and Pnv9Chip models Cédric Le Goater
2018-06-15  3:16   ` David Gibson

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