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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 12/43] hw/core/or-irq: Support more than 16 inputs to an OR gate
Date: Fri, 15 Jun 2018 15:24:50 +0100	[thread overview]
Message-ID: <20180615142521.19143-13-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180615142521.19143-1-peter.maydell@linaro.org>

For the IoTKit MPC support, we need to wire together the
interrupt outputs of 17 MPCs; this exceeds the current
value of MAX_OR_LINES. Increase MAX_OR_LINES to 32 (which
should be enough for anyone).

The tricky part is retaining the migration compatibility for
existing OR gates; we add a subsection which is only used
for larger OR gates, and define it such that we can freely
increase MAX_OR_LINES in future (or even move to a dynamically
allocated levels[] array without an upper size limit) without
breaking compatibility.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180604152941.20374-10-peter.maydell@linaro.org
---
 include/hw/or-irq.h |  5 ++++-
 hw/core/or-irq.c    | 39 +++++++++++++++++++++++++++++++++++++--
 2 files changed, 41 insertions(+), 3 deletions(-)

diff --git a/include/hw/or-irq.h b/include/hw/or-irq.h
index 3f6fc1b58a4..5a31e5a1881 100644
--- a/include/hw/or-irq.h
+++ b/include/hw/or-irq.h
@@ -31,7 +31,10 @@
 
 #define TYPE_OR_IRQ "or-irq"
 
-#define MAX_OR_LINES      16
+/* This can safely be increased if necessary without breaking
+ * migration compatibility (as long as it remains greater than 15).
+ */
+#define MAX_OR_LINES      32
 
 typedef struct OrIRQState qemu_or_irq;
 
diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c
index f9d76c46415..a86901b673c 100644
--- a/hw/core/or-irq.c
+++ b/hw/core/or-irq.c
@@ -66,14 +66,49 @@ static void or_irq_init(Object *obj)
     qdev_init_gpio_out(DEVICE(obj), &s->out_irq, 1);
 }
 
+/* The original version of this device had a fixed 16 entries in its
+ * VMState array; devices with more inputs than this need to
+ * migrate the extra lines via a subsection.
+ * The subsection migrates as much of the levels[] array as is needed
+ * (including repeating the first 16 elements), to avoid the awkwardness
+ * of splitting it in two to meet the requirements of VMSTATE_VARRAY_UINT16.
+ */
+#define OLD_MAX_OR_LINES 16
+#if MAX_OR_LINES < OLD_MAX_OR_LINES
+#error MAX_OR_LINES must be at least 16 for migration compatibility
+#endif
+
+static bool vmstate_extras_needed(void *opaque)
+{
+    qemu_or_irq *s = OR_IRQ(opaque);
+
+    return s->num_lines >= OLD_MAX_OR_LINES;
+}
+
+static const VMStateDescription vmstate_or_irq_extras = {
+    .name = "or-irq-extras",
+    .version_id = 1,
+    .minimum_version_id = 1,
+    .needed = vmstate_extras_needed,
+    .fields = (VMStateField[]) {
+        VMSTATE_VARRAY_UINT16_UNSAFE(levels, qemu_or_irq, num_lines, 0,
+                                     vmstate_info_bool, bool),
+        VMSTATE_END_OF_LIST(),
+    },
+};
+
 static const VMStateDescription vmstate_or_irq = {
     .name = TYPE_OR_IRQ,
     .version_id = 1,
     .minimum_version_id = 1,
     .fields = (VMStateField[]) {
-        VMSTATE_BOOL_ARRAY(levels, qemu_or_irq, MAX_OR_LINES),
+        VMSTATE_BOOL_SUB_ARRAY(levels, qemu_or_irq, 0, OLD_MAX_OR_LINES),
         VMSTATE_END_OF_LIST(),
-    }
+    },
+    .subsections = (const VMStateDescription*[]) {
+        &vmstate_or_irq_extras,
+        NULL
+    },
 };
 
 static Property or_irq_properties[] = {
-- 
2.17.1

  parent reply	other threads:[~2018-06-15 14:25 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-15 14:24 [Qemu-devel] [PULL 00/43] target-arm queue Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 01/43] arm_gicv3_kvm: kvm_dist_get/put_priority: skip the registers banked by GICR_IPRIORITYR Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 02/43] hw/arm/mps2-tz: Put ethernet controller behind PPC Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 03/43] hw/sh/sh7750: Convert away from old_mmio Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 04/43] hw/m68k/mcf5206: " Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 05/43] hw/block/pflash_cfi02: " Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 06/43] hw/watchdog/wdt_i6300esb: " Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 07/43] hw/input/pckbd: " Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 08/43] hw/char/parallel: " Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 09/43] stellaris: Stop using armv7m_init() Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 10/43] hw/arm/armv7m: Remove unused armv7m_init() function Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 11/43] arm: Don't crash if user tries to use a Cortex-M CPU without an NVIC Peter Maydell
2018-06-15 14:24 ` Peter Maydell [this message]
2018-06-15 14:24 ` [Qemu-devel] [PULL 13/43] cpu-defs.h: Document CPUIOTLBEntry 'addr' field Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 14/43] cputlb: Pass cpu_transaction_failed() the correct physaddr Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 15/43] CODING_STYLE: Define our preferred form for multiline comments Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 16/43] bswap: Add new stn_*_p() and ldn_*_p() memory access functions Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 17/43] exec.c: Don't accidentally sign-extend 4-byte loads in subpage_read() Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 18/43] exec.c: Use stn_p() and ldn_p() instead of explicit switches Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 19/43] target/arm: Extend vec_reg_offset to larger sizes Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 20/43] target/arm: Implement SVE Permute - Unpredicated Group Peter Maydell
2018-06-15 14:24 ` [Qemu-devel] [PULL 21/43] target/arm: Implement SVE Permute - Predicates Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 22/43] target/arm: Implement SVE Permute - Interleaving Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 23/43] target/arm: Implement SVE compress active elements Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 24/43] target/arm: Implement SVE conditionally broadcast/extract element Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 25/43] target/arm: Implement SVE copy to vector (predicated) Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 26/43] target/arm: Implement SVE reverse within elements Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 27/43] target/arm: Implement SVE vector splice (predicated) Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 28/43] target/arm: Implement SVE Select Vectors Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 29/43] target/arm: Implement SVE Integer Compare - " Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 30/43] target/arm: Implement SVE Integer Compare - Immediate Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 31/43] target/arm: Implement SVE Partition Break Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 32/43] target/arm: Implement SVE Predicate Count Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 33/43] target/arm: Implement SVE Integer Compare - Scalars Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 34/43] target/arm: Implement FDUP/DUP Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 35/43] target/arm: Implement SVE Integer Wide Immediate - Unpredicated Group Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 36/43] target/arm: Implement SVE Floating Point Arithmetic " Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 37/43] aspeed_scu: Implement RNG register Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 38/43] m25p80: add support for two bytes WRSR for Macronix chips Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 39/43] iommu: Add IOMMU index concept to IOMMU API Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 40/43] iommu: Add IOMMU index argument to notifier APIs Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 41/43] iommu: Add IOMMU index argument to translate method Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 42/43] exec.c: Handle IOMMUs in address_space_translate_for_iotlb() Peter Maydell
2018-06-15 14:25 ` [Qemu-devel] [PULL 43/43] target/arm: Allow ARMv6-M Thumb2 instructions Peter Maydell
2018-06-15 15:30 ` [Qemu-devel] [PULL 00/43] target-arm queue Peter Maydell

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