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From: David Gibson <david@gibson.dropbear.id.au>
To: BALATON Zoltan <balaton@eik.bme.hu>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
	Alexander Graf <agraf@suse.de>,
	Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v3 7/9] sm501: Implement i2c part for reading monitor EDID
Date: Mon, 18 Jun 2018 11:06:06 +1000	[thread overview]
Message-ID: <20180618010606.GL25461@umbus.fritz.box> (raw)
In-Reply-To: <alpine.BSF.2.21.1806141003570.19899@zero.eik.bme.hu>

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On Thu, Jun 14, 2018 at 10:06:33AM +0200, BALATON Zoltan wrote:
> On Thu, 14 Jun 2018, David Gibson wrote:
> > On Thu, Jun 14, 2018 at 02:17:00AM +0200, BALATON Zoltan wrote:
> > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
> > 
> > Again needs a commit message expanding on what this is and why it's
> > useful.
> 
> What else need to be explained apart from that SM501 has an i2c part which
> is used to access EDID info of attached monitor. But this is what the commit
> title already says. This patch implements that so far not emulated part of
> the chip.

In this case it would be sufficient just to say the same thing, but in
a less compressed form than the subject line.  e.g.

| The sm501 controller includes an i2c slave from which the monitor's
| EDID information can be read.  This wasn't yet implemented in qemu,
| so this patch adds it.
|
| (The sm501 part is used only by the SH4 and PPC sam460ex machine
| types in qemu)

> 
> > [snip]
> > >  static const VMStateDescription vmstate_sm501_sysbus = {
> > >      .name = TYPE_SYSBUS_SM501,
> > > -    .version_id = 1,
> > > -    .minimum_version_id = 1,
> > > +    .version_id = 2,
> > > +    .minimum_version_id = 2,
> > >      .fields = (VMStateField[]) {
> > >          VMSTATE_STRUCT(state, SM501SysBusState, 1,
> > >                         vmstate_sm501_state, SM501State),
> > 
> > Additionally, since you're changing the migration stream, you need to
> > point out that this is not used in any machine types which support
> > cross-version migration.
> 
> AFAIK it is only used in SH4 and PPC sam460ex.
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2018-06-18  1:06 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-14  0:17 [Qemu-devel] [PATCH v3 0/9] Misc sam460ex improvements BALATON Zoltan
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 1/9] ppc4xx_i2c: Remove unimplemented sdata and intr registers BALATON Zoltan
2018-06-14  1:14   ` David Gibson
2018-06-14  8:18     ` BALATON Zoltan
2018-06-15  5:27       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 3/9] ppc4xx_i2c: Rewrite to model hardware more closely BALATON Zoltan
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 9/9] target/ppc: Add missing opcode for icbt on PPC440 BALATON Zoltan
2018-06-14  1:36   ` David Gibson
2018-06-14  8:03     ` BALATON Zoltan
2018-06-14 12:43       ` David Gibson
2018-06-15  9:35         ` BALATON Zoltan
2018-06-18  1:03           ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 2/9] ppc4xx_i2c: Implement directcntl register BALATON Zoltan
2018-06-14  1:17   ` David Gibson
2018-06-14  7:51     ` BALATON Zoltan
2018-06-18  0:58       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 4/9] hw/timer: Add basic M41T80 emulation BALATON Zoltan
2018-06-14  1:36   ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 7/9] sm501: Implement i2c part for reading monitor EDID BALATON Zoltan
2018-06-14  1:35   ` David Gibson
2018-06-14  8:06     ` BALATON Zoltan
2018-06-18  1:06       ` David Gibson [this message]
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 8/9] sm501: Perform a full update after palette change BALATON Zoltan
2018-06-14  1:35   ` David Gibson
2018-06-14  8:00     ` BALATON Zoltan
2018-06-14 12:42       ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 5/9] sam460ex: Add RTC device BALATON Zoltan
2018-06-14  1:36   ` David Gibson
2018-06-14  0:17 ` [Qemu-devel] [PATCH v3 6/9] sm501: Do not clear read only bits when writing registers BALATON Zoltan
2018-06-14  1:33   ` David Gibson

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