From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, groug@kaod.org,
clg@kaod.org, agraf@suse.de, aik@ozlabs.ru,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 06/28] mac_newworld: add via machine option to control mac99 VIA/ADB configuration
Date: Mon, 18 Jun 2018 13:53:02 +1000 [thread overview]
Message-ID: <20180618035324.19907-7-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180618035324.19907-1-david@gibson.dropbear.id.au>
From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
This option allows the VIA configuration to be controlled between 3
different possible setups: cuda, pmu-adb and pmu with USB rather than ADB
keyboard/mouse.
For the moment we don't do anything with the configuration except to pass
it to the macio device (the via-cuda parent) and also to the firmware via
the fw_cfg interface so that it can present the correct device tree.
The default is cuda which is the current default and so will have no
change in behaviour.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/misc/macio/macio.c | 7 ++++
hw/ppc/mac.h | 6 +++
hw/ppc/mac_newworld.c | 69 +++++++++++++++++++++++++++++++----
include/hw/misc/macio/macio.h | 2 +
include/hw/ppc/ppc.h | 1 +
5 files changed, 78 insertions(+), 7 deletions(-)
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index f9a40eea81..dddf743bcb 100644
--- a/hw/misc/macio/macio.c
+++ b/hw/misc/macio/macio.c
@@ -399,6 +399,12 @@ static const VMStateDescription vmstate_macio_newworld = {
}
};
+static Property macio_newworld_properties[] = {
+ DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
+ DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
+ DEFINE_PROP_END_OF_LIST()
+};
+
static void macio_newworld_class_init(ObjectClass *oc, void *data)
{
PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
@@ -407,6 +413,7 @@ static void macio_newworld_class_init(ObjectClass *oc, void *data)
pdc->realize = macio_newworld_realize;
pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
dc->vmsd = &vmstate_macio_newworld;
+ dc->props = macio_newworld_properties;
}
static Property macio_properties[] = {
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 8046cd8a2f..4c08f52b87 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -71,9 +71,15 @@
#define CORE99_MACHINE(obj) OBJECT_CHECK(Core99MachineState, (obj), \
TYPE_CORE99_MACHINE)
+#define CORE99_VIA_CONFIG_CUDA 0x0
+#define CORE99_VIA_CONFIG_PMU 0x1
+#define CORE99_VIA_CONFIG_PMU_ADB 0x2
+
typedef struct Core99MachineState {
/*< private >*/
MachineState parent;
+
+ uint8_t via_config;
} Core99MachineState;
/* MacIO */
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 5331aa002c..ca21d47234 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -111,6 +111,7 @@ static void ppc_core99_init(MachineState *machine)
const char *kernel_cmdline = machine->kernel_cmdline;
const char *initrd_filename = machine->initrd_filename;
const char *boot_device = machine->boot_order;
+ Core99MachineState *core99_machine = CORE99_MACHINE(machine);
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
char *filename;
@@ -122,6 +123,7 @@ static void ppc_core99_init(MachineState *machine)
UNINHostState *uninorth_pci;
PCIBus *pci_bus;
NewWorldMacIOState *macio;
+ bool has_pmu, has_adb;
MACIOIDEState *macio_ide;
BusState *adb_bus;
MacIONVRAMState *nvr;
@@ -361,6 +363,9 @@ static void ppc_core99_init(MachineState *machine)
}
machine->usb |= defaults_enabled() && !machine->usb_disabled;
+ has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
+ has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
+ core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
/* Timebase Frequency */
if (kvm_enabled()) {
@@ -376,6 +381,8 @@ static void ppc_core99_init(MachineState *machine)
macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
dev = DEVICE(macio);
qdev_prop_set_uint64(dev, "frequency", tbfreq);
+ qdev_prop_set_bit(dev, "has-pmu", has_pmu);
+ qdev_prop_set_bit(dev, "has-adb", has_adb);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort);
qdev_init_nofail(dev);
@@ -391,19 +398,21 @@ static void ppc_core99_init(MachineState *machine)
"ide[1]"));
macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
- dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
- adb_bus = qdev_get_child_bus(dev, "adb.0");
- dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
- qdev_init_nofail(dev);
- dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
- qdev_init_nofail(dev);
+ if (has_adb) {
+ dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
+ adb_bus = qdev_get_child_bus(dev, "adb.0");
+ dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
+ qdev_init_nofail(dev);
+ dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
+ qdev_init_nofail(dev);
+ }
if (machine->usb) {
pci_create_simple(pci_bus, -1, "pci-ohci");
/* U3 needs to use USB for input because Linux doesn't support via-cuda
on PPC64 */
- if (machine_arch == ARCH_MAC99_U3) {
+ if (!has_adb || machine_arch == ARCH_MAC99_U3) {
USBBus *usb_bus = usb_bus_find(-1);
usb_create_simple(usb_bus, "usb-kbd");
@@ -459,6 +468,8 @@ static void ppc_core99_init(MachineState *machine)
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
+
fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
if (kvm_enabled()) {
#ifdef CONFIG_KVM
@@ -515,8 +526,52 @@ static void core99_machine_class_init(ObjectClass *oc, void *data)
#endif
}
+static char *core99_get_via_config(Object *obj, Error **errp)
+{
+ Core99MachineState *cms = CORE99_MACHINE(obj);
+
+ switch (cms->via_config) {
+ default:
+ case CORE99_VIA_CONFIG_CUDA:
+ return g_strdup("cuda");
+
+ case CORE99_VIA_CONFIG_PMU:
+ return g_strdup("pmu");
+
+ case CORE99_VIA_CONFIG_PMU_ADB:
+ return g_strdup("pmu-adb");
+ }
+}
+
+static void core99_set_via_config(Object *obj, const char *value, Error **errp)
+{
+ Core99MachineState *cms = CORE99_MACHINE(obj);
+
+ if (!strcmp(value, "cuda")) {
+ cms->via_config = CORE99_VIA_CONFIG_CUDA;
+ } else if (!strcmp(value, "pmu")) {
+ cms->via_config = CORE99_VIA_CONFIG_PMU;
+ } else if (!strcmp(value, "pmu-adb")) {
+ cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
+ } else {
+ error_setg(errp, "Invalid via value");
+ error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
+ }
+}
+
static void core99_instance_init(Object *obj)
{
+ Core99MachineState *cms = CORE99_MACHINE(obj);
+
+ /* Default via_config is CORE99_VIA_CONFIG_CUDA */
+ cms->via_config = CORE99_VIA_CONFIG_CUDA;
+ object_property_add_str(obj, "via", core99_get_via_config,
+ core99_set_via_config, NULL);
+ object_property_set_description(obj, "via",
+ "Set VIA configuration. "
+ "Valid values are cuda, pmu and pmu-adb",
+ NULL);
+
return;
}
diff --git a/include/hw/misc/macio/macio.h b/include/hw/misc/macio/macio.h
index 838eaf1db0..9529073ba8 100644
--- a/include/hw/misc/macio/macio.h
+++ b/include/hw/misc/macio/macio.h
@@ -70,6 +70,8 @@ typedef struct NewWorldMacIOState {
MacIOState parent_obj;
/*< public >*/
+ bool has_pmu;
+ bool has_adb;
OpenPICState *pic;
MACIOIDEState ide[2];
} NewWorldMacIOState;
diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
index b18ef3eefb..298ec354a8 100644
--- a/include/hw/ppc/ppc.h
+++ b/include/hw/ppc/ppc.h
@@ -101,6 +101,7 @@ enum {
#define FW_CFG_PPC_NVRAM_ADDR (FW_CFG_ARCH_LOCAL + 0x08)
#define FW_CFG_PPC_BUSFREQ (FW_CFG_ARCH_LOCAL + 0x09)
#define FW_CFG_PPC_NVRAM_FLAT (FW_CFG_ARCH_LOCAL + 0x0a)
+#define FW_CFG_PPC_VIACONFIG (FW_CFG_ARCH_LOCAL + 0x0b)
#define PPC_SERIAL_MM_BAUDBASE 399193
--
2.17.1
next prev parent reply other threads:[~2018-06-18 3:53 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-18 3:52 [Qemu-devel] [PULL 00/28] ppc-for-3.0 queue 20180618 David Gibson
2018-06-18 3:52 ` [Qemu-devel] [PULL 01/28] target/ppc: Don't require private l1d cache on POWER8 for cap_ppc_safe_cache David Gibson
2018-06-18 3:52 ` [Qemu-devel] [PULL 02/28] ppc/spapr_caps: Don't disable cap_cfpc on POWER8 by default David Gibson
2018-06-18 3:52 ` [Qemu-devel] [PULL 03/28] target/ppc: drop empty #if/#endif block David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 04/28] spapr: fix leak in h_client_architecture_support() David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 05/28] ppc: introduce Core99MachinesState for the mac99 machine David Gibson
2018-06-18 3:53 ` David Gibson [this message]
2018-06-18 3:53 ` [Qemu-devel] [PULL 07/28] mac_newworld: add gpios to macio devices with PMU enabled David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 08/28] mac_newworld: wire up programmer switch to NMI handler David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 09/28] adb: fix read reg 3 byte ordering David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 10/28] adb: add property to disable direct reg 3 writes David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 11/28] mac_newworld: add PMU device David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 12/28] xics_kvm: fix a build break David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 13/28] mos6522: only clear the shift register interrupt upon write David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 14/28] mos6522: remove additional interrupt flag filter from mos6522_update_irq() David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 15/28] mos6522: expose mos6522_update_irq() through MOS6522DeviceClass David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 16/28] sm501: Do not clear read only bits when writing registers David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 17/28] spapr: Clean up cpu realize/unrealize paths David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 18/28] pnv: Fix some error handling cpu realize() David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 19/28] pnv_core: Allocate cpu thread objects individually David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 20/28] pnv: Clean up cpu realize path David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 21/28] pnv: Add cpu unrealize path David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 22/28] spapr_cpu_core: convert last snprintf() to g_strdup_printf() David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 23/28] spapr_cpu_core: fix potential leak in spapr_cpu_core_realize() David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 24/28] spapr_cpu_core: add missing rollback on realization path David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 25/28] spapr_cpu_core: introduce spapr_create_vcpu() David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 26/28] ppc/pnv: introduce a pnv_chip_core_realize() routine David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 27/28] target/ppc, spapr: Move VPA information to machine_data David Gibson
2018-06-18 3:53 ` [Qemu-devel] [PULL 28/28] spapr: fix xics_system_init() error path David Gibson
2018-06-19 11:57 ` [Qemu-devel] [PULL 00/28] ppc-for-3.0 queue 20180618 Peter Maydell
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