qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Greg Kurz <groug@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: abologna@redhat.com, clg@kaod.org, qemu-ppc@nongnu.org,
	qemu-devel@nongnu.org, aik@ozlabs.ru
Subject: Re: [Qemu-devel] [PATCH 1/9] target/ppc: Allow cpu compatiblity checks based on type, not instance
Date: Mon, 18 Jun 2018 15:22:03 +0200	[thread overview]
Message-ID: <20180618152203.59158d68@bahia.lan> (raw)
In-Reply-To: <20180618063606.2513-2-david@gibson.dropbear.id.au>

On Mon, 18 Jun 2018 16:35:58 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:

> ppc_check_compat() is used in a number of places to check if a cpu object
> supports a certain compatiblity mode, subject to various constraints.
> 
> It takes a PowerPCCPU *, however it really only depends on the cpu's class.
> We have upcoming cases where it would be useful to make compatibility
> checks before we fully instantiate the cpu objects.
> 
> ppc_type_check_compat() will now make an equivalent check, but based on a
> CPU's QOM typename instead of an instantiated CPU object.
> 
> We make use of the new interface in several places in spapr, where we're
> essentially making a global check, rather than one specific to a particular
> cpu.  This avoids some ugly uses of first_cpu to grab a "representative"
> instance.
> 

Nice cleanup !

> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---

Reviewed-by: Greg Kurz <groug@kaod.org>

>  hw/ppc/spapr.c      | 10 ++++------
>  hw/ppc/spapr_caps.c | 19 +++++++++----------
>  target/ppc/compat.c | 27 +++++++++++++++++++++------
>  target/ppc/cpu.h    |  4 ++++
>  4 files changed, 38 insertions(+), 22 deletions(-)
> 
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index db0fb385d4..b0b94fc1f0 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -1616,8 +1616,8 @@ static void spapr_machine_reset(void)
>  
>      first_ppc_cpu = POWERPC_CPU(first_cpu);
>      if (kvm_enabled() && kvmppc_has_cap_mmu_radix() &&
> -        ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0,
> -                         spapr->max_compat_pvr)) {
> +        ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0,
> +                              spapr->max_compat_pvr)) {
>          /* If using KVM with radix mode available, VCPUs can be started
>           * without a HPT because KVM will start them in radix mode.
>           * Set the GR bit in PATB so that we know there is no HPT. */
> @@ -2520,7 +2520,6 @@ static void spapr_machine_init(MachineState *machine)
>      long load_limit, fw_size;
>      char *filename;
>      Error *resize_hpt_err = NULL;
> -    PowerPCCPU *first_ppc_cpu;
>  
>      msi_nonbroken = true;
>  
> @@ -2618,10 +2617,9 @@ static void spapr_machine_init(MachineState *machine)
>      /* init CPUs */
>      spapr_init_cpus(spapr);
>  
> -    first_ppc_cpu = POWERPC_CPU(first_cpu);
>      if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) &&
> -        ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0,
> -                         spapr->max_compat_pvr)) {
> +        ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_00, 0,
> +                              spapr->max_compat_pvr)) {
>          /* KVM and TCG always allow GTSE with radix... */
>          spapr_ovec_set(spapr->ov5, OV5_MMU_RADIX_GTSE);
>      }
> diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
> index 00e43a9ba7..469f38f0ef 100644
> --- a/hw/ppc/spapr_caps.c
> +++ b/hw/ppc/spapr_caps.c
> @@ -327,27 +327,26 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
>  };
>  
>  static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr,
> -                                               CPUState *cs)
> +                                               const char *cputype)
>  {
>      sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
> -    PowerPCCPU *cpu = POWERPC_CPU(cs);
>      sPAPRCapabilities caps;
>  
>      caps = smc->default_caps;
>  
> -    if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07,
> -                          0, spapr->max_compat_pvr)) {
> +    if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
> +                               0, spapr->max_compat_pvr)) {
>          caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
>          caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
>      }
>  
> -    if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06_PLUS,
> -                          0, spapr->max_compat_pvr)) {
> +    if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
> +                               0, spapr->max_compat_pvr)) {
>          caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
>      }
>  
> -    if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06,
> -                          0, spapr->max_compat_pvr)) {
> +    if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
> +                               0, spapr->max_compat_pvr)) {
>          caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
>          caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
>          caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
> @@ -384,7 +383,7 @@ int spapr_caps_post_migration(sPAPRMachineState *spapr)
>      sPAPRCapabilities dstcaps = spapr->eff;
>      sPAPRCapabilities srccaps;
>  
> -    srccaps = default_caps_with_cpu(spapr, first_cpu);
> +    srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
>      for (i = 0; i < SPAPR_CAP_NUM; i++) {
>          /* If not default value then assume came in with the migration */
>          if (spapr->mig.caps[i] != spapr->def.caps[i]) {
> @@ -446,7 +445,7 @@ void spapr_caps_reset(sPAPRMachineState *spapr)
>      int i;
>  
>      /* First compute the actual set of caps we're running with.. */
> -    default_caps = default_caps_with_cpu(spapr, first_cpu);
> +    default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
>  
>      for (i = 0; i < SPAPR_CAP_NUM; i++) {
>          /* Store the defaults */
> diff --git a/target/ppc/compat.c b/target/ppc/compat.c
> index 807c906f68..7de4bf3122 100644
> --- a/target/ppc/compat.c
> +++ b/target/ppc/compat.c
> @@ -105,17 +105,13 @@ static const CompatInfo *compat_by_pvr(uint32_t pvr)
>      return NULL;
>  }
>  
> -bool ppc_check_compat(PowerPCCPU *cpu, uint32_t compat_pvr,
> -                      uint32_t min_compat_pvr, uint32_t max_compat_pvr)
> +static bool pcc_compat(PowerPCCPUClass *pcc, uint32_t compat_pvr,
> +                       uint32_t min_compat_pvr, uint32_t max_compat_pvr)
>  {
> -    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
>      const CompatInfo *compat = compat_by_pvr(compat_pvr);
>      const CompatInfo *min = compat_by_pvr(min_compat_pvr);
>      const CompatInfo *max = compat_by_pvr(max_compat_pvr);
>  
> -#if !defined(CONFIG_USER_ONLY)
> -    g_assert(cpu->vhyp);
> -#endif
>      g_assert(!min_compat_pvr || min);
>      g_assert(!max_compat_pvr || max);
>  
> @@ -134,6 +130,25 @@ bool ppc_check_compat(PowerPCCPU *cpu, uint32_t compat_pvr,
>      return true;
>  }
>  
> +bool ppc_check_compat(PowerPCCPU *cpu, uint32_t compat_pvr,
> +                      uint32_t min_compat_pvr, uint32_t max_compat_pvr)
> +{
> +    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
> +
> +#if !defined(CONFIG_USER_ONLY)
> +    g_assert(cpu->vhyp);
> +#endif
> +
> +    return pcc_compat(pcc, compat_pvr, min_compat_pvr, max_compat_pvr);
> +}
> +
> +bool ppc_type_check_compat(const char *cputype, uint32_t compat_pvr,
> +                           uint32_t min_compat_pvr, uint32_t max_compat_pvr)
> +{
> +    PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(object_class_by_name(cputype));
> +    return pcc_compat(pcc, compat_pvr, min_compat_pvr, max_compat_pvr);
> +}
> +
>  void ppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr, Error **errp)
>  {
>      const CompatInfo *compat = compat_by_pvr(compat_pvr);
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 874da6efbc..c7f3fb6b73 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1369,7 +1369,11 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch)
>  #if defined(TARGET_PPC64)
>  bool ppc_check_compat(PowerPCCPU *cpu, uint32_t compat_pvr,
>                        uint32_t min_compat_pvr, uint32_t max_compat_pvr);
> +bool ppc_type_check_compat(const char *cputype, uint32_t compat_pvr,
> +                           uint32_t min_compat_pvr, uint32_t max_compat_pvr);
> +
>  void ppc_set_compat(PowerPCCPU *cpu, uint32_t compat_pvr, Error **errp);
> +
>  #if !defined(CONFIG_USER_ONLY)
>  void ppc_set_compat_all(uint32_t compat_pvr, Error **errp);
>  #endif

  reply	other threads:[~2018-06-18 13:22 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-18  6:35 [Qemu-devel] [PATCH 0/9] spapr: Clean up pagesize handling David Gibson
2018-06-18  6:35 ` [Qemu-devel] [PATCH 1/9] target/ppc: Allow cpu compatiblity checks based on type, not instance David Gibson
2018-06-18 13:22   ` Greg Kurz [this message]
2018-06-21  5:20   ` Cédric Le Goater
2018-06-18  6:35 ` [Qemu-devel] [PATCH 2/9] spapr: Compute effective capability values earlier David Gibson
2018-06-18 13:37   ` Greg Kurz
2018-06-21  5:32   ` Cédric Le Goater
2018-06-18  6:36 ` [Qemu-devel] [PATCH 3/9] spapr: Add cpu_apply hook to capabilities David Gibson
2018-06-18 15:28   ` Greg Kurz
2018-06-21  5:34   ` Cédric Le Goater
2018-06-18  6:36 ` [Qemu-devel] [PATCH 4/9] target/ppc: Add kvmppc_hpt_needs_host_contiguous_pages() helper David Gibson
2018-06-18 15:32   ` Greg Kurz
2018-06-21  5:56   ` Cédric Le Goater
2018-06-21  6:34     ` David Gibson
2018-06-18  6:36 ` [Qemu-devel] [PATCH 5/9] spapr: Maximum (HPT) pagesize property David Gibson
2018-06-19  9:23   ` Cédric Le Goater
2018-06-19 11:22     ` David Gibson
2018-06-21  6:22   ` Cédric Le Goater
2018-06-21 11:00     ` David Gibson
2018-06-21  9:19   ` Greg Kurz
2018-06-21 11:01     ` David Gibson
2018-06-18  6:36 ` [Qemu-devel] [PATCH 6/9] spapr: Use maximum page size capability to simplify memory backend checking David Gibson
2018-06-21  6:29   ` Cédric Le Goater
2018-06-21 11:06     ` David Gibson
2018-06-21 10:29   ` Greg Kurz
2018-06-21 11:11     ` David Gibson
2018-06-18  6:36 ` [Qemu-devel] [PATCH 7/9] target/ppc: Add ppc_hash64_filter_pagesizes() David Gibson
2018-06-21  6:38   ` Cédric Le Goater
2018-06-21 11:48   ` Greg Kurz
2018-06-18  6:36 ` [Qemu-devel] [PATCH 8/9] spapr: Limit available pagesizes to provide a consistent guest environment David Gibson
2018-06-21  7:01   ` Cédric Le Goater
2018-06-21 11:52     ` David Gibson
2018-06-21 12:50       ` Cédric Le Goater
2018-06-21 13:58         ` David Gibson
2018-06-21 12:24   ` Greg Kurz
2018-06-21 14:01     ` David Gibson
2018-06-21 14:18       ` Greg Kurz
2018-06-18  6:36 ` [Qemu-devel] [PATCH 9/9] spapr: Don't rewrite mmu capabilities in KVM mode David Gibson
2018-06-21  7:53   ` Cédric Le Goater
2018-06-21 12:01     ` David Gibson
2018-06-21 12:51       ` Cédric Le Goater
2018-06-21  1:08 ` [Qemu-devel] [PATCH 0/9] spapr: Clean up pagesize handling David Gibson
2018-06-21  6:52 ` no-reply

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180618152203.59158d68@bahia.lan \
    --to=groug@kaod.org \
    --cc=abologna@redhat.com \
    --cc=aik@ozlabs.ru \
    --cc=clg@kaod.org \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).