From: "Alex Bennée" <alex.bennee@linaro.org>
To: peter.maydell@linaro.org
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
richard.henderson@linaro.org,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [RISU PATCH v4 12/22] contrib/generate_all.sh: allow passing of arguments to risugen
Date: Fri, 22 Jun 2018 15:11:55 +0100 [thread overview]
Message-ID: <20180622141205.16306-13-alex.bennee@linaro.org> (raw)
In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org>
This allows us to use any new risugen options when generating all our
test patterns.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
contrib/generate_all.sh | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/contrib/generate_all.sh b/contrib/generate_all.sh
index 1e6b847..651cb23 100755
--- a/contrib/generate_all.sh
+++ b/contrib/generate_all.sh
@@ -12,11 +12,11 @@
# Alex Bennée <alex.bennee@linaro.org> - initial implementation
#
# Usage:
-# ./contrib/generate_all.sh <arch.risu> <target directory>
+# ./contrib/generate_all.sh <arch.risu> <target directory> -- risugen args
set -e
-USAGE="Usage: `basename $0` [-h] [-n x] <risufile> <target dir>"
+USAGE="Usage: `basename $0` [-h] [-n x] <risufile> <target dir> -- [risugen args]"
SPLIT=4
RISUGEN=$(CDPATH= cd -- "$(dirname -- "$0")/.." && pwd -P)/risugen
@@ -41,18 +41,24 @@ done
# Remove the switches we parsed above.
shift `expr $OPTIND - 1`
-while [ $# -ne 0 ]; do
+# Parse up to and including any --
+RISUGEN_ARGS=""
+while [ $# -ne 0 ] && [ -z "$RISUGEN_ARGS" ]; do
if [ -f $1 ]; then
RISU_FILE=$1;
elif [ -d $1 ]; then
TARGET_DIR=$1;
+ elif [ "$1" = "--" ]; then
+ RISUGEN_ARGS=$1
elif [ ! -e $1 ]; then
TARGET_DIR=$1
fi
shift
done
+# anything left is for RISUGEN
+RISUGEN_ARGS=$@
if test -z "${RISUGEN}" || test ! -x "${RISUGEN}"; then
echo "Couldn't find risugen (${RISUGEN})"
@@ -90,7 +96,7 @@ while test $# -gt 0 ; do
fi
done
I_FILE="${I_FILE}_INC.risu.bin"
- CMD="${RISUGEN} ${INSN_PATTERNS} ${RISU_FILE} ${I_FILE}"
+ CMD="${RISUGEN} ${RISUGEN_ARGS} ${INSN_PATTERNS} ${RISU_FILE} ${I_FILE}"
echo "Running: $CMD"
$CMD
done
--
2.17.1
next prev parent reply other threads:[~2018-06-22 14:22 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 14:11 [Qemu-devel] [RISU PATCH v4 00/22] ARM SVE support for RISU Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 01/22] risu_reginfo_aarch64: include signal.h for FPSIMD_MAGIC Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 02/22] comms: include header for writev Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 03/22] build-all-arches: expand the range of docker images Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 04/22] build-all-arches: do a distclean $(SRC) configured Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 05/22] risu: add zlib indication to help text Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 06/22] Makefile: include risu_reginfo_$(ARCH) in HDRS Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 07/22] risugen: add --sve support Alex Bennée
2018-06-24 22:43 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 08/22] risugen: Initialize sve predicates with random data Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 09/22] risugen: use fewer insns for aarch64 immediate load Alex Bennée
2018-06-24 22:45 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 10/22] risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpers Alex Bennée
2018-06-24 22:49 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 11/22] risugen: add dtype_msz address helper Alex Bennée
2018-06-22 14:11 ` Alex Bennée [this message]
2018-06-24 22:53 ` [Qemu-devel] [RISU PATCH v4 12/22] contrib/generate_all.sh: allow passing of arguments to risugen Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 13/22] risu: move optional args to each architecture Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 14/22] risu: add process_arch_opt Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 15/22] risu_reginfo_aarch64: drop stray ; Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 16/22] risu_reginfo_aarch64: unionify VFP regs Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 17/22] risu_reginfo: introduce reginfo_size() Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 18/22] risu_reginfo_aarch64: left justify regnums and drop masks Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 19/22] risu_reginfo_aarch64: add support for copying SVE register state Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 20/22] risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatch Alex Bennée
2018-06-24 22:58 ` Richard Henderson
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 21/22] risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 22/22] risu_reginfo_aarch64: handle variable VQ Alex Bennée
2018-06-24 23:04 ` Richard Henderson
2018-07-02 12:52 ` [Qemu-devel] [RISU PATCH v4 00/22] ARM SVE support for RISU Peter Maydell
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