From: "Alex Bennée" <alex.bennee@linaro.org>
To: peter.maydell@linaro.org
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
richard.henderson@linaro.org,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [RISU PATCH v4 14/22] risu: add process_arch_opt
Date: Fri, 22 Jun 2018 15:11:57 +0100 [thread overview]
Message-ID: <20180622141205.16306-15-alex.bennee@linaro.org> (raw)
In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org>
From: Richard Henderson <richard.henderson@linaro.org>
Allows the backend to do more that just set a flag when it comes to
processing options.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[AJB: tweaked order, added stdlib includes]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
risu.c | 33 +++++++++++----------------------
risu.h | 7 +++++--
risu_reginfo_aarch64.c | 10 ++++++++--
risu_reginfo_arm.c | 14 ++++++++++----
risu_reginfo_m68k.c | 10 ++++++++--
risu_reginfo_ppc64.c | 10 ++++++++--
6 files changed, 50 insertions(+), 34 deletions(-)
diff --git a/risu.c b/risu.c
index 18de351..01525d2 100644
--- a/risu.c
+++ b/risu.c
@@ -18,7 +18,6 @@
#include <errno.h>
#include <signal.h>
#include <ucontext.h>
-#include <getopt.h>
#include <setjmp.h>
#include <assert.h>
#include <sys/stat.h>
@@ -27,7 +26,6 @@
#include <string.h>
#include "config.h"
-
#include "risu.h"
void *memblock;
@@ -287,7 +285,7 @@ void usage(void)
}
}
-struct option * setup_options(char **short_opts)
+static struct option * setup_options(char **short_opts)
{
static struct option default_longopts[] = {
{"help", no_argument, 0, '?'},
@@ -303,20 +301,19 @@ struct option * setup_options(char **short_opts)
if (arch_long_opts) {
const size_t osize = sizeof(struct option);
- const int default_count = ARRAY_SIZE(default_longopts);
- struct option *dptr;
- int extra_count = 0;
+ const int default_count = ARRAY_SIZE(default_longopts) - 1;
+ int arch_count;
/* count additional opts */
- dptr = arch_long_opts;
- do {} while (dptr[extra_count++].name);
+ for (arch_count = 0; arch_long_opts[arch_count].name; arch_count++) {
+ continue;
+ }
- lopts = calloc(default_count + extra_count, osize);
+ lopts = calloc(default_count + arch_count + 1, osize);
/* Copy default opts + extra opts */
memcpy(lopts, default_longopts, default_count * osize);
- dptr = &lopts[default_count - 1];
- memcpy(dptr, arch_long_opts, extra_count * osize);
+ memcpy(lopts + default_count, arch_long_opts, arch_count * osize);
}
return lopts;
@@ -343,34 +340,26 @@ int main(int argc, char **argv)
switch (c) {
case 0:
- {
/* flag set by getopt_long, do nothing */
break;
- }
case 't':
- {
trace_fn = optarg;
trace = 1;
break;
- }
case 'h':
- {
hostname = optarg;
break;
- }
case 'p':
- {
/* FIXME err handling */
port = strtol(optarg, 0, 10);
break;
- }
case '?':
- {
usage();
exit(1);
- }
default:
- abort();
+ assert(c >= FIRST_ARCH_OPT);
+ process_arch_opt(c, optarg);
+ break;
}
}
diff --git a/risu.h b/risu.h
index 89811f4..48c50d9 100644
--- a/risu.h
+++ b/risu.h
@@ -16,10 +16,13 @@
#include <stdint.h>
#include <ucontext.h>
#include <stdio.h>
+#include <getopt.h>
/* Extra option processing for architectures */
-extern void *arch_long_opts;
-extern char *arch_extra_help;
+extern const struct option * const arch_long_opts;
+extern const char * const arch_extra_help;
+void process_arch_opt(int opt, const char *arg);
+#define FIRST_ARCH_OPT 0x100
/* GCC computed include to pull in the correct risu_reginfo_*.h for
* the architecture.
diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c
index ab12270..c270e0b 100644
--- a/risu_reginfo_aarch64.c
+++ b/risu_reginfo_aarch64.c
@@ -14,12 +14,18 @@
#include <ucontext.h>
#include <string.h>
#include <signal.h> /* for FPSIMD_MAGIC */
+#include <stdlib.h>
#include "risu.h"
#include "risu_reginfo_aarch64.h"
-void *arch_long_opts;
-char *arch_extra_help;
+const struct option * const arch_long_opts;
+const char * const arch_extra_help;
+
+void process_arch_opt(int opt, const char *arg)
+{
+ abort();
+}
/* reginfo_init: initialize with a ucontext */
void reginfo_init(struct reginfo *ri, ucontext_t *uc)
diff --git a/risu_reginfo_arm.c b/risu_reginfo_arm.c
index 5acad02..12ad0ef 100644
--- a/risu_reginfo_arm.c
+++ b/risu_reginfo_arm.c
@@ -13,7 +13,7 @@
#include <stdio.h>
#include <ucontext.h>
#include <string.h>
-#include <getopt.h>
+#include <stdlib.h>
#include "risu.h"
#include "risu_reginfo_arm.h"
@@ -22,13 +22,19 @@ extern int insnsize(ucontext_t *uc);
/* Should we test for FP exception status bits? */
static int test_fp_exc;
-static struct option extra_opts[] = {
+static const struct option extra_opts[] = {
{"test-fp-exc", no_argument, &test_fp_exc, 1},
{0, 0, 0, 0}
};
-void *arch_long_opts = &extra_opts[0];
-char *arch_extra_help = " --test-fp-exc Check FP exception bits when comparing\n";
+const struct option * const arch_long_opts = &extra_opts[0];
+const char * const arch_extra_help =
+ " --test-fp-exc Check FP exception bits when comparing\n";
+
+void process_arch_opt(int opt, const char *arg)
+{
+ abort();
+}
static void reginfo_init_vfp(struct reginfo *ri, ucontext_t *uc)
{
diff --git a/risu_reginfo_m68k.c b/risu_reginfo_m68k.c
index d429502..7a1c5a9 100644
--- a/risu_reginfo_m68k.c
+++ b/risu_reginfo_m68k.c
@@ -10,12 +10,18 @@
#include <ucontext.h>
#include <string.h>
#include <math.h>
+#include <stdlib.h>
#include "risu.h"
#include "risu_reginfo_m68k.h"
-void *arch_long_opts;
-char *arch_extra_help;
+const struct option * const arch_long_opts;
+const char * const arch_extra_help;
+
+void process_arch_opt(int opt, const char *arg)
+{
+ abort();
+}
/* reginfo_init: initialize with a ucontext */
void reginfo_init(struct reginfo *ri, ucontext_t *uc)
diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c
index 395111c..4b70460 100644
--- a/risu_reginfo_ppc64.c
+++ b/risu_reginfo_ppc64.c
@@ -15,6 +15,7 @@
#include <ucontext.h>
#include <string.h>
#include <math.h>
+#include <stdlib.h>
#include "risu.h"
#include "risu_reginfo_ppc64.h"
@@ -22,8 +23,13 @@
#define XER 37
#define CCR 38
-void *arch_long_opts;
-char *arch_extra_help;
+const struct option * const arch_long_opts;
+const char * const arch_extra_help;
+
+void process_arch_opt(int opt, const char *arg)
+{
+ abort();
+}
/* reginfo_init: initialize with a ucontext */
void reginfo_init(struct reginfo *ri, ucontext_t *uc)
--
2.17.1
next prev parent reply other threads:[~2018-06-22 14:12 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-22 14:11 [Qemu-devel] [RISU PATCH v4 00/22] ARM SVE support for RISU Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 01/22] risu_reginfo_aarch64: include signal.h for FPSIMD_MAGIC Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 02/22] comms: include header for writev Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 03/22] build-all-arches: expand the range of docker images Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 04/22] build-all-arches: do a distclean $(SRC) configured Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 05/22] risu: add zlib indication to help text Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 06/22] Makefile: include risu_reginfo_$(ARCH) in HDRS Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 07/22] risugen: add --sve support Alex Bennée
2018-06-24 22:43 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 08/22] risugen: Initialize sve predicates with random data Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 09/22] risugen: use fewer insns for aarch64 immediate load Alex Bennée
2018-06-24 22:45 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 10/22] risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpers Alex Bennée
2018-06-24 22:49 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 11/22] risugen: add dtype_msz address helper Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 12/22] contrib/generate_all.sh: allow passing of arguments to risugen Alex Bennée
2018-06-24 22:53 ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 13/22] risu: move optional args to each architecture Alex Bennée
2018-06-22 14:11 ` Alex Bennée [this message]
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 15/22] risu_reginfo_aarch64: drop stray ; Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 16/22] risu_reginfo_aarch64: unionify VFP regs Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 17/22] risu_reginfo: introduce reginfo_size() Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 18/22] risu_reginfo_aarch64: left justify regnums and drop masks Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 19/22] risu_reginfo_aarch64: add support for copying SVE register state Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 20/22] risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatch Alex Bennée
2018-06-24 22:58 ` Richard Henderson
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 21/22] risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 22/22] risu_reginfo_aarch64: handle variable VQ Alex Bennée
2018-06-24 23:04 ` Richard Henderson
2018-07-02 12:52 ` [Qemu-devel] [RISU PATCH v4 00/22] ARM SVE support for RISU Peter Maydell
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