qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Alex Bennée" <alex.bennee@linaro.org>
To: peter.maydell@linaro.org
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org,
	richard.henderson@linaro.org,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [RISU PATCH v4 22/22] risu_reginfo_aarch64: handle variable VQ
Date: Fri, 22 Jun 2018 15:12:05 +0100	[thread overview]
Message-ID: <20180622141205.16306-23-alex.bennee@linaro.org> (raw)
In-Reply-To: <20180622141205.16306-1-alex.bennee@linaro.org>

This involves parsing the command line parameter and calling the
kernel to set the VQ limit. We also add dumping of the register state
in the main register dump.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 risu_reginfo_aarch64.c | 38 +++++++++++++++++++++++++++++++++++---
 1 file changed, 35 insertions(+), 3 deletions(-)

diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c
index bf98ba1..00d1c8b 100644
--- a/risu_reginfo_aarch64.c
+++ b/risu_reginfo_aarch64.c
@@ -18,6 +18,8 @@
 #include <stddef.h>
 #include <stdbool.h>
 #include <inttypes.h>
+#include <assert.h>
+#include <sys/prctl.h>
 
 #include "risu.h"
 #include "risu_reginfo_aarch64.h"
@@ -30,17 +32,41 @@ const char * const arch_extra_help;
 /* Should we test SVE register state */
 static int test_sve;
 static const struct option extra_opts[] = {
-    {"test-sve", no_argument, &test_sve, 1},
+    {"test-sve", required_argument, NULL, FIRST_ARCH_OPT },
     {0, 0, 0, 0}
 };
 
 const struct option * const arch_long_opts = &extra_opts[0];
-const char * const arch_extra_help = "  --test-sve        Compare SVE registers\n";
+const char * const arch_extra_help
+    = "  --test-sve=<vq>        Compare SVE registers with VQ\n";
 #endif
 
 void process_arch_opt(int opt, const char *arg)
 {
+#ifdef SVE_MAGIC
+    long want, got;
+
+    assert(opt == FIRST_ARCH_OPT);
+    test_sve = strtol(arg, 0, 10);
+
+    if (test_sve <= 0 || test_sve > SVE_VQ_MAX) {
+        fprintf(stderr, "Invalid value for VQ (1-%d)\n", SVE_VQ_MAX);
+        exit(1);
+    }
+    want = sve_vl_from_vq(test_sve);
+    got = prctl(PR_SVE_SET_VL, want);
+    if (want != got) {
+        if (got < 0) {
+            perror("prctl PR_SVE_SET_VL");
+        } else {
+            fprintf(stderr, "Unsupported value for VQ (%d != %d)\n",
+                    test_sve, (int)sve_vq_from_vl(got));
+        }
+        exit(1);
+    }
+#else
     abort();
+#endif
 }
 
 const int reginfo_size(void)
@@ -113,12 +139,18 @@ void reginfo_init(struct reginfo *ri, ucontext_t *uc)
 
 #ifdef SVE_MAGIC
     if (test_sve) {
-        int vq = sve_vq_from_vl(sve->vl); /* number of quads for whole vl */
+        int vq = test_sve;
 
         if (sve == NULL) {
             fprintf(stderr, "risu_reginfo_aarch64: failed to get SVE state\n");
             return;
         }
+        if (sve->vl != sve_vl_from_vq(vq)) {
+            fprintf(stderr, "risu_reginfo_aarch64: "
+                    "unexpected SVE state: %d != %d\n",
+                    sve->vl, sve_vl_from_vq(vq));
+            return;
+        }
 
         ri->sve.vl = sve->vl;
 
-- 
2.17.1

  parent reply	other threads:[~2018-06-22 14:12 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-22 14:11 [Qemu-devel] [RISU PATCH v4 00/22] ARM SVE support for RISU Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 01/22] risu_reginfo_aarch64: include signal.h for FPSIMD_MAGIC Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 02/22] comms: include header for writev Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 03/22] build-all-arches: expand the range of docker images Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 04/22] build-all-arches: do a distclean $(SRC) configured Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 05/22] risu: add zlib indication to help text Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 06/22] Makefile: include risu_reginfo_$(ARCH) in HDRS Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 07/22] risugen: add --sve support Alex Bennée
2018-06-24 22:43   ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 08/22] risugen: Initialize sve predicates with random data Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 09/22] risugen: use fewer insns for aarch64 immediate load Alex Bennée
2018-06-24 22:45   ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 10/22] risugen: add reg_plus_imm_pl and reg_plus_imm_vl address helpers Alex Bennée
2018-06-24 22:49   ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 11/22] risugen: add dtype_msz address helper Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 12/22] contrib/generate_all.sh: allow passing of arguments to risugen Alex Bennée
2018-06-24 22:53   ` Richard Henderson
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 13/22] risu: move optional args to each architecture Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 14/22] risu: add process_arch_opt Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 15/22] risu_reginfo_aarch64: drop stray ; Alex Bennée
2018-06-22 14:11 ` [Qemu-devel] [RISU PATCH v4 16/22] risu_reginfo_aarch64: unionify VFP regs Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 17/22] risu_reginfo: introduce reginfo_size() Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 18/22] risu_reginfo_aarch64: left justify regnums and drop masks Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 19/22] risu_reginfo_aarch64: add support for copying SVE register state Alex Bennée
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 20/22] risu_reginfo_aarch64: add SVE support to reginfo_dump_mismatch Alex Bennée
2018-06-24 22:58   ` Richard Henderson
2018-06-22 14:12 ` [Qemu-devel] [RISU PATCH v4 21/22] risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture Alex Bennée
2018-06-22 14:12 ` Alex Bennée [this message]
2018-06-24 23:04   ` [Qemu-devel] [RISU PATCH v4 22/22] risu_reginfo_aarch64: handle variable VQ Richard Henderson
2018-07-02 12:52 ` [Qemu-devel] [RISU PATCH v4 00/22] ARM SVE support for RISU Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180622141205.16306-23-alex.bennee@linaro.org \
    --to=alex.bennee@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).