* [Qemu-devel] [PATCH 0/1] target/m68k: correctly disassemble move16
@ 2018-06-25 20:35 Laurent Vivier
2018-06-25 20:35 ` [Qemu-devel] [PATCH 1/1] " Laurent Vivier
2018-07-02 2:10 ` [Qemu-devel] [PATCH 0/1] " no-reply
0 siblings, 2 replies; 4+ messages in thread
From: Laurent Vivier @ 2018-06-25 20:35 UTC (permalink / raw)
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
"move16 %a0@+,%a1@" and "fmovel (cpid=3) %a0@-,%fpcr" share the same opcode...
but QEMU executes move16 (and M68040 too).
You can try:
--------------8<--------------------------------------- move16.S
.data
src:
.long 0x01020304, 0x05060708, 0x090a0b0c, 0x0d0e0f00
dst:
.long 0, 0, 0, 0
.text
.globl _start
_start:
lea src,%a0
lea dst,%a1
.fopt id=3
fmovel -(%a0),%fpcr
move16 (%a0)+, (%a1)+
move.l #0,%d1
move.l #1, %d0
trap #0
--------------8<--------------------------------------- move16.S
m68k-linux-gnu-gcc -g -m68040 -nostartfiles -nodefaultlibs \
-nostdlib -o move16 move16.S
m68k-linux-gnu-objdump -d move16
move16: file format elf32-m68k
Disassembly of section .text:
800000b8 <_start>:
800000b8: 41f9 8000 20d4 lea 800020d4 <src>,%a0
800000be: 43f9 8000 20e4 lea 800020e4 <dst>,%a1
800000c4: f620 9000 move16 %a0@+,%a1@+
800000c8: f620 9000 move16 %a0@+,%a1@+
800000cc: 7200 moveq #0,%d1
800000ce: 7001 moveq #1,%d0
800000d0: 4e40 trap #0
qemu-m68k -d in_asm ./move16
----------------
IN:
0x800000b8: lea 0x800020d4,%a0
0x800000be: lea 0x800020e4,%a1
0x800000c4: fmovel (cpid=3) %a0@-,%fpcr
0x800000c8: fmovel (cpid=3) %a0@-,%fpcr
0x800000cc: moveq #0,%d1
0x800000ce: moveq #1,%d0
0x800000d0: trap #0
This patch backports the fix from binutils to only match FPU instructions
with coprocessor ID 1.
Laurent Vivier (1):
target/m68k: correctly disassemble move16
disas/m68k.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--
2.14.4
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH 1/1] target/m68k: correctly disassemble move16
2018-06-25 20:35 [Qemu-devel] [PATCH 0/1] target/m68k: correctly disassemble move16 Laurent Vivier
@ 2018-06-25 20:35 ` Laurent Vivier
2018-06-26 4:24 ` Thomas Huth
2018-07-02 2:10 ` [Qemu-devel] [PATCH 0/1] " no-reply
1 sibling, 1 reply; 4+ messages in thread
From: Laurent Vivier @ 2018-06-25 20:35 UTC (permalink / raw)
To: qemu-devel; +Cc: Thomas Huth, Laurent Vivier
"move16 %a0@+,%a1@" and "fmovel (cpid=3) %a0@-,%fpcr"
share the same opcode.
To fix that, backport the fix from binutils:
2005-11-10 Andreas Schwab <schwab@suse.de>
* m68k-dis.c (print_insn_m68k): Only match FPU insns with
coprocessor ID 1.
Reported-by: Thomas Huth <huth@tuxfamily.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
disas/m68k.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/disas/m68k.c b/disas/m68k.c
index 61b689ef3e..a687df437c 100644
--- a/disas/m68k.c
+++ b/disas/m68k.c
@@ -2017,6 +2017,20 @@ print_insn_m68k (bfd_vma memaddr, disassemble_info *info)
}
}
+ /* Don't match FPU insns with non-default coprocessor ID. */
+ if (*d == '\0')
+ {
+ for (d = opc->args; *d; d += 2)
+ {
+ if (d[0] == 'I')
+ {
+ val = fetch_arg (buffer, 'd', 3, info);
+ if (val != 1)
+ break;
+ }
+ }
+ }
+
if (*d == '\0')
if ((val = match_insn_m68k (memaddr, info, opc, & priv)))
return val;
--
2.14.4
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH 1/1] target/m68k: correctly disassemble move16
2018-06-25 20:35 ` [Qemu-devel] [PATCH 1/1] " Laurent Vivier
@ 2018-06-26 4:24 ` Thomas Huth
0 siblings, 0 replies; 4+ messages in thread
From: Thomas Huth @ 2018-06-26 4:24 UTC (permalink / raw)
To: Laurent Vivier; +Cc: qemu-devel
Am Mon, 25 Jun 2018 22:35:59 +0200
schrieb Laurent Vivier <laurent@vivier.eu>:
> "move16 %a0@+,%a1@" and "fmovel (cpid=3) %a0@-,%fpcr"
> share the same opcode.
>
> To fix that, backport the fix from binutils:
>
> 2005-11-10 Andreas Schwab <schwab@suse.de>
>
> * m68k-dis.c (print_insn_m68k): Only match FPU insns with
> coprocessor ID 1.
>
> Reported-by: Thomas Huth <huth@tuxfamily.org>
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
> disas/m68k.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
Thank you very much, Laurent, this indeed fixes the problem for me!
Tested-by: Thomas Huth <huth@tuxfamily.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [PATCH 0/1] target/m68k: correctly disassemble move16
2018-06-25 20:35 [Qemu-devel] [PATCH 0/1] target/m68k: correctly disassemble move16 Laurent Vivier
2018-06-25 20:35 ` [Qemu-devel] [PATCH 1/1] " Laurent Vivier
@ 2018-07-02 2:10 ` no-reply
1 sibling, 0 replies; 4+ messages in thread
From: no-reply @ 2018-07-02 2:10 UTC (permalink / raw)
To: laurent; +Cc: famz, qemu-devel, huth
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180625203559.21370-1-laurent@vivier.eu
Subject: [Qemu-devel] [PATCH 0/1] target/m68k: correctly disassemble move16
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
ce9f09fe63 target/m68k: correctly disassemble move16
=== OUTPUT BEGIN ===
Checking PATCH 1/1: target/m68k: correctly disassemble move16...
ERROR: that open brace { should be on the previous line
#30: FILE: disas/m68k.c:2021:
+ if (*d == '\0')
+ {
ERROR: suspect code indent for conditional statements (10, 14)
#30: FILE: disas/m68k.c:2021:
+ if (*d == '\0')
+ {
ERROR: that open brace { should be on the previous line
#32: FILE: disas/m68k.c:2023:
+ for (d = opc->args; *d; d += 2)
+ {
ERROR: suspect code indent for conditional statements (14, 18)
#32: FILE: disas/m68k.c:2023:
+ for (d = opc->args; *d; d += 2)
+ {
ERROR: that open brace { should be on the previous line
#34: FILE: disas/m68k.c:2025:
+ if (d[0] == 'I')
+ {
ERROR: suspect code indent for conditional statements (18, 22)
#34: FILE: disas/m68k.c:2025:
+ if (d[0] == 'I')
+ {
ERROR: space prohibited between function name and open parenthesis '('
#36: FILE: disas/m68k.c:2027:
+ val = fetch_arg (buffer, 'd', 3, info);
ERROR: braces {} are necessary for all arms of this statement
#37: FILE: disas/m68k.c:2028:
+ if (val != 1)
[...]
total: 8 errors, 0 warnings, 20 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-07-02 2:10 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-25 20:35 [Qemu-devel] [PATCH 0/1] target/m68k: correctly disassemble move16 Laurent Vivier
2018-06-25 20:35 ` [Qemu-devel] [PATCH 1/1] " Laurent Vivier
2018-06-26 4:24 ` Thomas Huth
2018-07-02 2:10 ` [Qemu-devel] [PATCH 0/1] " no-reply
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).