From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH 0/6] target/arm SVE updates
Date: Thu, 28 Jun 2018 17:15:32 -0700 [thread overview]
Message-ID: <20180629001538.11415-1-richard.henderson@linaro.org> (raw)
Patch 1 fixes the SIGFPE that Alex found with --test-sve=3.
Patch 2 fixes a problem pointed out by Laurent, presumably
via inspection.
The rest begin enabling cpu features for -cpu max.
I'm still working on SVE itself, but these are standalone
and perhaps worth merging before softfreeze.
r~
Richard Henderson (6):
target/arm: Fix SVE signed division vs x86 overflow exception
target/arm: Fix SVE system register access checks
target/arm: Prune a57 features from max
target/arm: Prune a15 features from max
target/arm: Add ID_ISAR6
target/arm: Set ISAR bits for -cpu max
target/arm/cpu.h | 1 +
target/arm/cpu.c | 31 +++++++++++++++++--------
target/arm/cpu64.c | 47 ++++++++++++++++++++++++--------------
target/arm/helper.c | 13 +++++------
target/arm/sve_helper.c | 16 +++++++++----
target/arm/translate-a64.c | 5 ++--
6 files changed, 71 insertions(+), 42 deletions(-)
--
2.17.1
next reply other threads:[~2018-06-29 0:15 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-29 0:15 Richard Henderson [this message]
2018-06-29 0:15 ` [Qemu-devel] [PATCH 1/6] target/arm: Fix SVE signed division vs x86 overflow exception Richard Henderson
2018-06-29 0:42 ` Philippe Mathieu-Daudé
2018-06-29 8:29 ` Peter Maydell
2018-06-29 9:10 ` Peter Maydell
2018-06-29 14:43 ` Richard Henderson
2018-06-29 0:15 ` [Qemu-devel] [PATCH 2/6] target/arm: Fix SVE system register access checks Richard Henderson
2018-06-29 0:48 ` Philippe Mathieu-Daudé
2018-06-29 8:30 ` Peter Maydell
2018-06-29 9:23 ` Laurent Desnogues
2018-06-29 0:15 ` [Qemu-devel] [PATCH 3/6] target/arm: Prune a57 features from max Richard Henderson
2018-06-29 0:38 ` Philippe Mathieu-Daudé
2018-06-29 8:31 ` Peter Maydell
2018-06-29 0:15 ` [Qemu-devel] [PATCH 4/6] target/arm: Prune a15 " Richard Henderson
2018-06-29 0:39 ` Philippe Mathieu-Daudé
2018-06-29 8:32 ` Peter Maydell
2018-06-29 0:15 ` [Qemu-devel] [PATCH 5/6] target/arm: Add ID_ISAR6 Richard Henderson
2018-06-29 0:57 ` Philippe Mathieu-Daudé
2018-06-29 1:09 ` Philippe Mathieu-Daudé
2018-06-29 3:51 ` Richard Henderson
2018-06-29 8:40 ` Peter Maydell
2018-06-29 14:47 ` Richard Henderson
2018-06-29 0:15 ` [Qemu-devel] [PATCH 6/6] target/arm: Set ISAR bits for -cpu max Richard Henderson
2018-06-29 1:03 ` Philippe Mathieu-Daudé
2018-06-29 8:42 ` Peter Maydell
2018-06-29 14:54 ` Richard Henderson
2018-06-29 15:08 ` Peter Maydell
2018-06-29 1:06 ` [Qemu-devel] [PATCH 0/6] target/arm SVE updates Philippe Mathieu-Daudé
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