From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH 3/6] target/arm: Prune a57 features from max
Date: Thu, 28 Jun 2018 17:15:35 -0700 [thread overview]
Message-ID: <20180629001538.11415-4-richard.henderson@linaro.org> (raw)
In-Reply-To: <20180629001538.11415-1-richard.henderson@linaro.org>
There is no need to re-set these 9 features already
implied by the call to aarch64_a57_initfn.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu64.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 3b4bc73ffa..8040493d5c 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -235,19 +235,10 @@ static void aarch64_max_initfn(Object *obj)
* whereas the architecture requires them to be present in both if
* present in either.
*/
- set_feature(&cpu->env, ARM_FEATURE_V8);
- set_feature(&cpu->env, ARM_FEATURE_VFP4);
- set_feature(&cpu->env, ARM_FEATURE_NEON);
- set_feature(&cpu->env, ARM_FEATURE_AARCH64);
- set_feature(&cpu->env, ARM_FEATURE_V8_AES);
- set_feature(&cpu->env, ARM_FEATURE_V8_SHA1);
- set_feature(&cpu->env, ARM_FEATURE_V8_SHA256);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA512);
set_feature(&cpu->env, ARM_FEATURE_V8_SHA3);
set_feature(&cpu->env, ARM_FEATURE_V8_SM3);
set_feature(&cpu->env, ARM_FEATURE_V8_SM4);
- set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
- set_feature(&cpu->env, ARM_FEATURE_CRC);
set_feature(&cpu->env, ARM_FEATURE_V8_ATOMICS);
set_feature(&cpu->env, ARM_FEATURE_V8_RDM);
set_feature(&cpu->env, ARM_FEATURE_V8_DOTPROD);
--
2.17.1
next prev parent reply other threads:[~2018-06-29 0:15 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-29 0:15 [Qemu-devel] [PATCH 0/6] target/arm SVE updates Richard Henderson
2018-06-29 0:15 ` [Qemu-devel] [PATCH 1/6] target/arm: Fix SVE signed division vs x86 overflow exception Richard Henderson
2018-06-29 0:42 ` Philippe Mathieu-Daudé
2018-06-29 8:29 ` Peter Maydell
2018-06-29 9:10 ` Peter Maydell
2018-06-29 14:43 ` Richard Henderson
2018-06-29 0:15 ` [Qemu-devel] [PATCH 2/6] target/arm: Fix SVE system register access checks Richard Henderson
2018-06-29 0:48 ` Philippe Mathieu-Daudé
2018-06-29 8:30 ` Peter Maydell
2018-06-29 9:23 ` Laurent Desnogues
2018-06-29 0:15 ` Richard Henderson [this message]
2018-06-29 0:38 ` [Qemu-devel] [PATCH 3/6] target/arm: Prune a57 features from max Philippe Mathieu-Daudé
2018-06-29 8:31 ` Peter Maydell
2018-06-29 0:15 ` [Qemu-devel] [PATCH 4/6] target/arm: Prune a15 " Richard Henderson
2018-06-29 0:39 ` Philippe Mathieu-Daudé
2018-06-29 8:32 ` Peter Maydell
2018-06-29 0:15 ` [Qemu-devel] [PATCH 5/6] target/arm: Add ID_ISAR6 Richard Henderson
2018-06-29 0:57 ` Philippe Mathieu-Daudé
2018-06-29 1:09 ` Philippe Mathieu-Daudé
2018-06-29 3:51 ` Richard Henderson
2018-06-29 8:40 ` Peter Maydell
2018-06-29 14:47 ` Richard Henderson
2018-06-29 0:15 ` [Qemu-devel] [PATCH 6/6] target/arm: Set ISAR bits for -cpu max Richard Henderson
2018-06-29 1:03 ` Philippe Mathieu-Daudé
2018-06-29 8:42 ` Peter Maydell
2018-06-29 14:54 ` Richard Henderson
2018-06-29 15:08 ` Peter Maydell
2018-06-29 1:06 ` [Qemu-devel] [PATCH 0/6] target/arm SVE updates Philippe Mathieu-Daudé
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