* [Qemu-devel] [PATCH for-3.0] accel/tcg: Don't treat invalid TLB entries as needing recheck
@ 2018-06-29 16:17 Peter Maydell
2018-06-29 16:23 ` Laurent Vivier
2018-06-29 17:40 ` Richard Henderson
0 siblings, 2 replies; 3+ messages in thread
From: Peter Maydell @ 2018-06-29 16:17 UTC (permalink / raw)
To: qemu-arm, qemu-devel; +Cc: Richard Henderson, Laurent Vivier, patches
In get_page_addr_code() when we check whether the TLB entry
is marked as TLB_RECHECK, we should not go down that code
path if the TLB entry is not valid at all (ie the TLB_INVALID
bit is set).
Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
This fixes the abort that Laurent was seeing with his m68k test case.
accel/tcg/cputlb.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index eebe97dabb7..a55296583b9 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -967,7 +967,8 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr)
}
}
- if (unlikely(env->tlb_table[mmu_idx][index].addr_code & TLB_RECHECK)) {
+ if (unlikely((env->tlb_table[mmu_idx][index].addr_code &
+ (TLB_RECHECK | TLB_INVALID_MASK)) == TLB_RECHECK)) {
/*
* This is a TLB_RECHECK access, where the MMU protection
* covers a smaller range than a target page, and we must
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH for-3.0] accel/tcg: Don't treat invalid TLB entries as needing recheck
2018-06-29 16:17 [Qemu-devel] [PATCH for-3.0] accel/tcg: Don't treat invalid TLB entries as needing recheck Peter Maydell
@ 2018-06-29 16:23 ` Laurent Vivier
2018-06-29 17:40 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Laurent Vivier @ 2018-06-29 16:23 UTC (permalink / raw)
To: Peter Maydell, qemu-arm, qemu-devel; +Cc: Richard Henderson, patches
Le 29/06/2018 à 18:17, Peter Maydell a écrit :
> In get_page_addr_code() when we check whether the TLB entry
> is marked as TLB_RECHECK, we should not go down that code
> path if the TLB entry is not valid at all (ie the TLB_INVALID
> bit is set).
>
> Reported-by: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> This fixes the abort that Laurent was seeing with his m68k test case.
>
> accel/tcg/cputlb.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index eebe97dabb7..a55296583b9 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -967,7 +967,8 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr)
> }
> }
>
> - if (unlikely(env->tlb_table[mmu_idx][index].addr_code & TLB_RECHECK)) {
> + if (unlikely((env->tlb_table[mmu_idx][index].addr_code &
> + (TLB_RECHECK | TLB_INVALID_MASK)) == TLB_RECHECK)) {
> /*
> * This is a TLB_RECHECK access, where the MMU protection
> * covers a smaller range than a target page, and we must
>
Thank you!
Tested-by: Laurent Vivier <laurent@vivier.eu>
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH for-3.0] accel/tcg: Don't treat invalid TLB entries as needing recheck
2018-06-29 16:17 [Qemu-devel] [PATCH for-3.0] accel/tcg: Don't treat invalid TLB entries as needing recheck Peter Maydell
2018-06-29 16:23 ` Laurent Vivier
@ 2018-06-29 17:40 ` Richard Henderson
1 sibling, 0 replies; 3+ messages in thread
From: Richard Henderson @ 2018-06-29 17:40 UTC (permalink / raw)
To: Peter Maydell, qemu-arm, qemu-devel; +Cc: Laurent Vivier, patches
On 06/29/2018 09:17 AM, Peter Maydell wrote:
> In get_page_addr_code() when we check whether the TLB entry
> is marked as TLB_RECHECK, we should not go down that code
> path if the TLB entry is not valid at all (ie the TLB_INVALID
> bit is set).
>
> Reported-by: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> This fixes the abort that Laurent was seeing with his m68k test case.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Also, queued to tcg-next.
r~
^ permalink raw reply [flat|nested] 3+ messages in thread
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2018-06-29 16:17 [Qemu-devel] [PATCH for-3.0] accel/tcg: Don't treat invalid TLB entries as needing recheck Peter Maydell
2018-06-29 16:23 ` Laurent Vivier
2018-06-29 17:40 ` Richard Henderson
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