qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Eduardo Habkost <ehabkost@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Robert Hoo <robert.hu@linux.intel.com>,
	qemu-devel@nongnu.org, rth@twiddle.net, robert.hu@intel.com,
	"Daniel P. Berrange" <berrange@redhat.com>
Subject: Re: [Qemu-devel] [PATCH 2/5] i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
Date: Fri, 29 Jun 2018 14:30:23 -0300	[thread overview]
Message-ID: <20180629173023.GN7451@localhost.localdomain> (raw)
In-Reply-To: <a1bae170-2543-2030-05a7-51378544b575@redhat.com>

On Fri, Jun 29, 2018 at 01:34:04PM +0200, Paolo Bonzini wrote:
> On 28/06/2018 20:30, Eduardo Habkost wrote:
> >> For migration to work, you need to add new "features" corresponding to
> >> the bits in the MSR, and include them in the Icelake-Server and
> >> Icelake-Client models.  Unfortunately there is no code for this in QEMU
> >> yet, though the API is there in KVM.
> > Will all Icelake VCPUs of a given model have the same value on
> > MSR_IA32_ARCH_CAPABILITIES?
> > 
> > If not, we can't choose a value that will work on all cases, and
> > it will require management software to be smarter and explicitly
> > configure some of the MSR bits on the command-line.
> 
> We can expect that it will change as more vulnerabilities are found and
> more microcode updates are issued.  We should get it right from the
> beginning.

Right.  Also, we probably want to enable arch-capabilities on
CPUID by default whenever possible, even if using an old CPU
model.  I expect Daniel's versioned CPU model proposal to help us
address this.

I'm worried about the soft freeze deadline (next Tuesday),
though.  I wouldn't like Icelake to miss QEMU 3.0 just because we
couldn't decide on a default MSR_IA32_ARCH_CAPABILITIES value in
time.

-- 
Eduardo

  reply	other threads:[~2018-06-29 17:30 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-25  3:39 [Qemu-devel] [PATCH 0/5] Add Icelake CPU model Robert Hoo
2018-06-25  3:39 ` [Qemu-devel] [PATCH 1/5] i386: Add support for IA32_PRED_CMD and IA32_ARCH_CAPABILITIES MSRs Robert Hoo
2018-06-25 11:51   ` Paolo Bonzini
2018-06-26  8:58     ` Robert Hoo
2018-06-26  9:20       ` Paolo Bonzini
2018-06-25  3:39 ` [Qemu-devel] [PATCH 2/5] i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR Robert Hoo
2018-06-25 12:06   ` Paolo Bonzini
2018-06-26 11:07     ` Robert Hoo
2018-06-28 18:30     ` Eduardo Habkost
2018-06-29 11:34       ` Paolo Bonzini
2018-06-29 17:30         ` Eduardo Habkost [this message]
2018-06-25  3:39 ` [Qemu-devel] [PATCH 3/5] i386: Add CPUID bit for PCONFIG Robert Hoo
2018-06-25  3:39 ` [Qemu-devel] [PATCH 4/5] i386: Add CPUID bit for WBNOINVD Robert Hoo
2018-06-25  3:39 ` [Qemu-devel] [PATCH 5/5] i386: Add new CPU model Icelake-{Server, Client} Robert Hoo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20180629173023.GN7451@localhost.localdomain \
    --to=ehabkost@redhat.com \
    --cc=berrange@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=robert.hu@intel.com \
    --cc=robert.hu@linux.intel.com \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).