From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, groug@kaod.org,
clg@kaod.org, agraf@suse.de, mdroth@linux.vnet.ibm.com,
aik@ozlabs.ru, Richard Henderson <richard.henderson@linaro.org>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 11/35] target/ppc: Add do_unaligned_access hook
Date: Tue, 3 Jul 2018 15:57:40 +1000 [thread overview]
Message-ID: <20180703055804.13449-12-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20180703055804.13449-1-david@gibson.dropbear.id.au>
From: Richard Henderson <richard.henderson@linaro.org>
This allows faults from MO_ALIGN to have the same effect
as from gen_check_align.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/excp_helper.c | 18 +++++++++++++++++-
target/ppc/internal.h | 5 +++++
target/ppc/translate_init.inc.c | 1 +
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index c092fbead0..d6e97a90e0 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -22,7 +22,7 @@
#include "exec/helper-proto.h"
#include "exec/exec-all.h"
#include "exec/cpu_ldst.h"
-
+#include "internal.h"
#include "helper_regs.h"
//#define DEBUG_OP
@@ -1198,3 +1198,19 @@ void helper_book3s_msgsnd(target_ulong rb)
qemu_mutex_unlock_iothread();
}
#endif
+
+void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
+ MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
+{
+ CPUPPCState *env = cs->env_ptr;
+ uint32_t insn;
+
+ /* Restore state and reload the insn we executed, for filling in DSISR. */
+ cpu_restore_state(cs, retaddr, true);
+ insn = cpu_ldl_code(env, env->nip);
+
+ cs->exception_index = POWERPC_EXCP_ALIGN;
+ env->error_code = insn & 0x03FF0000;
+ cpu_loop_exit(cs);
+}
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 1f441c6483..a9bcadff42 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -252,4 +252,9 @@ static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
+
+/* Raise a data fault alignment exception for the specified virtual address */
+void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+ MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr);
#endif /* PPC_INTERNAL_H */
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index 76d6f3fd5e..7813b1b004 100644
--- a/target/ppc/translate_init.inc.c
+++ b/target/ppc/translate_init.inc.c
@@ -10457,6 +10457,7 @@ static void ppc_cpu_class_init(ObjectClass *oc, void *data)
cc->set_pc = ppc_cpu_set_pc;
cc->gdb_read_register = ppc_cpu_gdb_read_register;
cc->gdb_write_register = ppc_cpu_gdb_write_register;
+ cc->do_unaligned_access = ppc_cpu_do_unaligned_access;
#ifdef CONFIG_USER_ONLY
cc->handle_mmu_fault = ppc_cpu_handle_mmu_fault;
#else
--
2.17.1
next prev parent reply other threads:[~2018-07-03 5:58 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-03 5:57 [Qemu-devel] [PULL 00/35] ppc-for-3.0 queue 20180703 David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 01/35] mac_dbdma: only dump commands for debug enabled channels David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 02/35] mac_newworld: always enable disable_direct_reg3_writes for ADB machines David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 03/35] sam460ex: Fix sam460ex device tree when booting the Linux kernel David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 04/35] ppc/xics: introduce ICP DeviceRealize and DeviceReset handlers David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 05/35] ppc/xics: introduce a parent_realize in ICSStateClass David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 06/35] ppc/xics: move the instance_init handler under the ics-base class David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 07/35] ppx/xics: introduce a parent_reset in ICSStateClass David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 08/35] ppc/xics: move the vmstate structures under the ics-base class David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 09/35] ppc/xics: rework the ICS classes inheritance tree David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 10/35] ppc/pnv: fix pnv_core_realize() error handling David Gibson
2018-07-03 5:57 ` David Gibson [this message]
2018-07-03 5:57 ` [Qemu-devel] [PULL 12/35] target/ppc: Use atomic load for LQ and LQARX David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 13/35] target/ppc: Use atomic store for STQ David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 14/35] target/ppc: Use atomic cmpxchg for STQCX David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 15/35] target/ppc: Remove POWERPC_EXCP_STCX David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 16/35] target/ppc: Tidy gen_conditional_store David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 17/35] target/ppc: Split out gen_load_locked David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 18/35] target/ppc: Split out gen_ld_atomic David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 19/35] target/ppc: Split out gen_st_atomic David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 20/35] target/ppc: Use MO_ALIGN for EXIWX and ECOWX David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 21/35] target/ppc: Use atomic min/max helpers David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 22/35] target/ppc: Implement the rest of gen_ld_atomic David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 23/35] target/ppc: Implement the rest of gen_st_atomic David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 24/35] fpu_helper.c: fix setting FPSCR[FI] bit David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 25/35] hw/ppc: Give sam46ex its own config option David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 26/35] ppc4xx_i2c: Rewrite to model hardware more closely David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 27/35] hw/timer: Add basic M41T80 emulation David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 28/35] sam460ex: Add RTC device David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 29/35] ppc440_uc: Basic emulation of PPC440 DMA controller David Gibson
2018-07-03 5:57 ` [Qemu-devel] [PULL 30/35] target/ppc/kvm: get rid of kvm_get_fallback_smmu_info() David Gibson
2018-07-03 5:58 ` [Qemu-devel] [PULL 31/35] target/ppc/kvm: don't pass cpu to kvm_get_smmu_info() David Gibson
2018-07-03 5:58 ` [Qemu-devel] [PULL 32/35] spapr: compute default value of "hpt-max-page-size" later David Gibson
2018-07-03 5:58 ` [Qemu-devel] [PULL 33/35] target/ppc: set is_jmp on ppc_tr_breakpoint_check David Gibson
2018-07-03 5:58 ` [Qemu-devel] [PULL 34/35] target/ppc: Relax reserved bitmask of indexed store instructions David Gibson
2018-07-03 5:58 ` [Qemu-devel] [PULL 35/35] ppc: Include vga cirrus card into the compiling process David Gibson
2018-07-03 19:00 ` Mark Cave-Ayland
2018-07-03 19:24 ` Sebastian Bauer
2018-07-04 4:50 ` Mark Cave-Ayland
2018-07-04 5:33 ` Sebastian Bauer
2018-07-04 5:56 ` Mark Cave-Ayland
2018-07-04 9:29 ` Sebastian Bauer
2018-07-04 10:26 ` [Qemu-devel] [Qemu-ppc] " BALATON Zoltan
2018-07-03 15:04 ` [Qemu-devel] [PULL 00/35] ppc-for-3.0 queue 20180703 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20180703055804.13449-12-david@gibson.dropbear.id.au \
--to=david@gibson.dropbear.id.au \
--cc=agraf@suse.de \
--cc=aik@ozlabs.ru \
--cc=clg@kaod.org \
--cc=groug@kaod.org \
--cc=mdroth@linux.vnet.ibm.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).