From: Julia Suvorova <jusual@mail.ru>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"Stefan Hajnoczi" <stefanha@redhat.com>,
"Joel Stanley" <joel@jms.id.au>,
"Jim Mussared" <jim@groklearning.com>,
"Steffen Görtz" <mail@steffen-goertz.de>,
"Julia Suvorova" <jusual@mail.ru>
Subject: [Qemu-devel] [PATCH v3 0/2] nvic: Handle ARMv6-M SCS reserved registers
Date: Fri, 6 Jul 2018 01:21:13 +0300 [thread overview]
Message-ID: <20180705222115.17013-1-jusual@mail.ru> (raw)
v3:
* Fix indents
v2:
* Use ARM_FEATURE_M_MAIN instead of ARM_FEATURE_V7 in most cases
* Remove CPUID registers check
* Use bad_offset instead of return
* Misc style fixes
Julia Suvorova (2):
nvic: Handle ARMv6-M SCS reserved registers
tests: Add ARMv6-M reserved register test
hw/intc/armv7m_nvic.c | 51 ++++++++++++++++++++++++--
tests/Makefile.include | 2 ++
tests/tcg/arm/test-reserved-reg.c | 60 +++++++++++++++++++++++++++++++
3 files changed, 111 insertions(+), 2 deletions(-)
create mode 100644 tests/tcg/arm/test-reserved-reg.c
--
2.17.1
next reply other threads:[~2018-07-05 22:21 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-05 22:21 Julia Suvorova [this message]
2018-07-05 22:21 ` [Qemu-devel] [PATCH v3 1/2] nvic: Handle ARMv6-M SCS reserved registers Julia Suvorova
2018-07-06 15:05 ` Peter Maydell
2018-07-05 22:21 ` [Qemu-devel] [RFC v3 2/2] tests: Add ARMv6-M reserved register test Julia Suvorova
2018-07-06 14:55 ` Peter Maydell
2018-07-11 13:00 ` Stefan Hajnoczi
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