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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 6/8] bcm2835_aux: Swap RX and TX interrupt assignments
Date: Mon, 16 Jul 2018 17:42:58 +0100	[thread overview]
Message-ID: <20180716164300.6731-7-peter.maydell@linaro.org> (raw)
In-Reply-To: <20180716164300.6731-1-peter.maydell@linaro.org>

From: Guenter Roeck <linux@roeck-us.net>

RX and TX interrupt bits were reversed, resulting in an endless sequence
of serial interupts in the emulated system and the following repeated
error message when booting Linux.

serial8250: too much work for irq61

This results in a boot failure most of the time.

Qemu command line used to reproduce the problem:

	qemu-system-aarch64 -M raspi3 -m 1024 \
	-kernel arch/arm64/boot/Image \
	--append "rdinit=/sbin/init console=ttyS1,115200"
	-initrd rootfs.cpio \
	-dtb arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dtb \
	-nographic -monitor null -serial null -serial stdio

This is with arm64:defconfig. The root file system was generated using
buildroot.

NB that this error likely arises from an erratum in the
BCM2835 datasheet where the TX and RX bits were swapped
in the AU_MU_IER_REG description (but correct for IIR):
 https://elinux.org/BCM2835_datasheet_errata#p12

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Message-id: 1529355846-25102-1-git-send-email-linux@roeck-us.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: added NB about datasheet]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/char/bcm2835_aux.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index 370dc7e2968..0364596c552 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -39,8 +39,8 @@
 #define AUX_MU_BAUD_REG 0x68
 
 /* bits in IER/IIR registers */
-#define TX_INT  0x1
-#define RX_INT  0x2
+#define RX_INT  0x1
+#define TX_INT  0x2
 
 static void bcm2835_aux_update(BCM2835AuxState *s)
 {
-- 
2.17.1

  parent reply	other threads:[~2018-07-16 16:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-16 16:42 [Qemu-devel] [PULL 0/8] target-arm queue Peter Maydell
2018-07-16 16:42 ` [Qemu-devel] [PULL 1/8] target/arm: Fix LD1W and LDFF1W (scalar plus vector) Peter Maydell
2018-07-16 16:42 ` [Qemu-devel] [PULL 2/8] aspeed: Implement write-1-{set, clear} for AST2500 strapping Peter Maydell
2018-07-16 16:42 ` [Qemu-devel] [PULL 3/8] hw/intc/arm_gic: Check interrupt number in gic_deactivate_irq() Peter Maydell
2018-07-16 16:42 ` [Qemu-devel] [PULL 4/8] hw/intc/arm_gic: Fix handling of GICD_ITARGETSR Peter Maydell
2018-07-16 16:42 ` [Qemu-devel] [PULL 5/8] hw/arm/bcm2836: Mark the bcm2836 / bcm2837 devices with user_creatable = false Peter Maydell
2018-07-16 16:42 ` Peter Maydell [this message]
2018-07-16 16:42 ` [Qemu-devel] [PULL 7/8] accel/tcg: Use correct test when looking in victim TLB for code Peter Maydell
2018-07-16 16:43 ` [Qemu-devel] [PULL 8/8] accel/tcg: Assert that tlb fill gave us a valid TLB entry Peter Maydell
2018-07-17  8:57 ` [Qemu-devel] [PULL 0/8] target-arm queue Peter Maydell

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