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From: David Gibson <david@gibson.dropbear.id.au>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Andrea Bolognani" <abologna@redhat.com>,
	"Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 1/2] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge
Date: Tue, 24 Jul 2018 14:10:54 +1000	[thread overview]
Message-ID: <20180724041054.GG6830@umbus.fritz.box> (raw)
In-Reply-To: <f8268fd70e4e91bc6333402ac48598d39a42e38e.camel@kernel.crashing.org>

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On Tue, Jul 24, 2018 at 01:49:32PM +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2018-07-24 at 12:14 +1000, David Gibson wrote:
> > > I don't know, is there much shared logic ? And the shared bits are the
> > > subclassing, that's handled that way...
> > > 
> > > This is really a different piece of HW, a separate ICS implementation,
> > > that has its own quirks, is configured via different registers, does
> > > EOI differently etc...
> > > 
> > > Even the resend stuff is done differently, the resend bitmap is
> > > actually SW visible via an IODA table.
> > > 
> > > I mean, we could (maybe we do these days not sure) have an ICS
> > > superclass wrapper on the actual icp_irq() but that's really all there
> > > is to it I think.
> > 
> > Hm, yeah, fair enough.  I realized what I was suggesting would
> > actually need another layer of qirqs than we have, so it's not a good
> > idea after all.  Ok, I'm happy proceeding with exposing icp_irq().
> 
> The only idea I have if you want to keep icp_* private is to put a
> 'helper' in the ICS superclass that the subclass uses to encapsulate
> the ICP call, but at this point it's just churn.

I concur.

> 
> But yeah you really don't want a layer of qirqs, it wouldn't work any
> way, it's really an ICS, it will send messages to the ICP with a XIRR
> value in them etc... just like an ICS, it's not somethign you want
> qirq's for .
> 

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2018-07-24  4:46 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-06-28  8:36 [Qemu-devel] [PATCH v2 0/2] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge Cédric Le Goater
2018-06-28  8:36 ` [Qemu-devel] [PATCH v2 1/2] " Cédric Le Goater
2018-07-09  7:22   ` Cédric Le Goater
2018-07-18  6:13     ` David Gibson
2018-07-18  6:12   ` David Gibson
2018-07-18  8:03     ` Benjamin Herrenschmidt
2018-07-23  4:16       ` David Gibson
2018-07-23 23:55         ` Benjamin Herrenschmidt
2018-07-24  2:14           ` David Gibson
2018-07-24  3:49             ` Benjamin Herrenschmidt
2018-07-24  4:10               ` David Gibson [this message]
2018-07-23 21:35     ` Cédric Le Goater
2018-07-23 21:37     ` Cédric Le Goater
2018-07-24  1:29       ` David Gibson
2018-07-23 21:38     ` Cédric Le Goater
2018-07-24 12:18     ` Cédric Le Goater
2018-07-27  5:32       ` David Gibson
2018-07-27  7:33         ` Cédric Le Goater
2018-07-27  8:08         ` Benjamin Herrenschmidt
2018-07-27  8:25           ` Cédric Le Goater
2018-07-27  8:43             ` Benjamin Herrenschmidt
2018-07-27  9:19               ` Cédric Le Goater
2018-07-30  8:56                 ` Cédric Le Goater
2018-07-26  9:03   ` Cédric Le Goater
2018-07-26 22:36     ` Benjamin Herrenschmidt
2018-07-27  7:16       ` Cédric Le Goater
2018-07-27  8:18         ` Benjamin Herrenschmidt
2018-06-28  8:36 ` [Qemu-devel] [PATCH v2 2/2] ppc/pnv: make the PHB3 devices user creatable Cédric Le Goater
2018-07-01 18:33 ` [Qemu-devel] [PATCH v2 0/2] ppc/pnv: Add model for Power8 PHB3 PCIe Host bridge no-reply

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