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* [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors
@ 2018-08-02 18:06 Peter Maydell
  2018-08-02 19:05 ` Philippe Mathieu-Daudé
  2018-08-03  7:22 ` Mark Cave-Ayland
  0 siblings, 2 replies; 4+ messages in thread
From: Peter Maydell @ 2018-08-02 18:06 UTC (permalink / raw)
  To: qemu-devel; +Cc: patches, Mark Cave-Ayland

Move the m48t59 device away from using old_mmio MemoryRegionOps
accessors.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
Tested with 'make check' and by booting a sparc guest.

 hw/timer/m48t59.c | 59 +++++++++--------------------------------------
 1 file changed, 11 insertions(+), 48 deletions(-)

diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index f2991762ab0..ca3ed445de7 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -493,66 +493,29 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
     return retval;
 }
 
-static void nvram_writeb (void *opaque, hwaddr addr, uint32_t value)
-{
-    M48t59State *NVRAM = opaque;
-
-    m48t59_write(NVRAM, addr, value & 0xff);
-}
-
-static void nvram_writew (void *opaque, hwaddr addr, uint32_t value)
-{
-    M48t59State *NVRAM = opaque;
-
-    m48t59_write(NVRAM, addr, (value >> 8) & 0xff);
-    m48t59_write(NVRAM, addr + 1, value & 0xff);
-}
-
-static void nvram_writel (void *opaque, hwaddr addr, uint32_t value)
-{
-    M48t59State *NVRAM = opaque;
-
-    m48t59_write(NVRAM, addr, (value >> 24) & 0xff);
-    m48t59_write(NVRAM, addr + 1, (value >> 16) & 0xff);
-    m48t59_write(NVRAM, addr + 2, (value >> 8) & 0xff);
-    m48t59_write(NVRAM, addr + 3, value & 0xff);
-}
-
-static uint32_t nvram_readb (void *opaque, hwaddr addr)
+static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size)
 {
     M48t59State *NVRAM = opaque;
 
     return m48t59_read(NVRAM, addr);
 }
 
-static uint32_t nvram_readw (void *opaque, hwaddr addr)
+static void nvram_write(void *opaque, hwaddr addr, uint64_t value,
+                        unsigned size)
 {
     M48t59State *NVRAM = opaque;
-    uint32_t retval;
 
-    retval = m48t59_read(NVRAM, addr) << 8;
-    retval |= m48t59_read(NVRAM, addr + 1);
-    return retval;
-}
-
-static uint32_t nvram_readl (void *opaque, hwaddr addr)
-{
-    M48t59State *NVRAM = opaque;
-    uint32_t retval;
-
-    retval = m48t59_read(NVRAM, addr) << 24;
-    retval |= m48t59_read(NVRAM, addr + 1) << 16;
-    retval |= m48t59_read(NVRAM, addr + 2) << 8;
-    retval |= m48t59_read(NVRAM, addr + 3);
-    return retval;
+    return m48t59_write(NVRAM, addr, value);
 }
 
 static const MemoryRegionOps nvram_ops = {
-    .old_mmio = {
-        .read = { nvram_readb, nvram_readw, nvram_readl, },
-        .write = { nvram_writeb, nvram_writew, nvram_writel, },
-    },
-    .endianness = DEVICE_NATIVE_ENDIAN,
+    .read = nvram_read,
+    .write = nvram_write,
+    .impl.min_access_size = 1,
+    .impl.max_access_size = 1,
+    .valid.min_access_size = 1,
+    .valid.max_access_size = 4,
+    .endianness = DEVICE_BIG_ENDIAN,
 };
 
 static const VMStateDescription vmstate_m48t59 = {
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors
  2018-08-02 18:06 [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors Peter Maydell
@ 2018-08-02 19:05 ` Philippe Mathieu-Daudé
  2018-08-03  7:22 ` Mark Cave-Ayland
  1 sibling, 0 replies; 4+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-08-02 19:05 UTC (permalink / raw)
  To: Peter Maydell, qemu-devel; +Cc: Mark Cave-Ayland, patches

On 08/02/2018 03:06 PM, Peter Maydell wrote:
> Move the m48t59 device away from using old_mmio MemoryRegionOps
> accessors.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
> Tested with 'make check' and by booting a sparc guest.
> 
>  hw/timer/m48t59.c | 59 +++++++++--------------------------------------
>  1 file changed, 11 insertions(+), 48 deletions(-)
> 
> diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
> index f2991762ab0..ca3ed445de7 100644
> --- a/hw/timer/m48t59.c
> +++ b/hw/timer/m48t59.c
> @@ -493,66 +493,29 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
>      return retval;
>  }
>  
> -static void nvram_writeb (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, value & 0xff);
> -}
> -
> -static void nvram_writew (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, (value >> 8) & 0xff);
> -    m48t59_write(NVRAM, addr + 1, value & 0xff);
> -}
> -
> -static void nvram_writel (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, (value >> 24) & 0xff);
> -    m48t59_write(NVRAM, addr + 1, (value >> 16) & 0xff);
> -    m48t59_write(NVRAM, addr + 2, (value >> 8) & 0xff);
> -    m48t59_write(NVRAM, addr + 3, value & 0xff);
> -}
> -
> -static uint32_t nvram_readb (void *opaque, hwaddr addr)
> +static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size)
>  {
>      M48t59State *NVRAM = opaque;
>  
>      return m48t59_read(NVRAM, addr);
>  }
>  
> -static uint32_t nvram_readw (void *opaque, hwaddr addr)
> +static void nvram_write(void *opaque, hwaddr addr, uint64_t value,
> +                        unsigned size)
>  {
>      M48t59State *NVRAM = opaque;
> -    uint32_t retval;
>  
> -    retval = m48t59_read(NVRAM, addr) << 8;
> -    retval |= m48t59_read(NVRAM, addr + 1);
> -    return retval;
> -}
> -
> -static uint32_t nvram_readl (void *opaque, hwaddr addr)
> -{
> -    M48t59State *NVRAM = opaque;
> -    uint32_t retval;
> -
> -    retval = m48t59_read(NVRAM, addr) << 24;
> -    retval |= m48t59_read(NVRAM, addr + 1) << 16;
> -    retval |= m48t59_read(NVRAM, addr + 2) << 8;
> -    retval |= m48t59_read(NVRAM, addr + 3);
> -    return retval;
> +    return m48t59_write(NVRAM, addr, value);
>  }
>  
>  static const MemoryRegionOps nvram_ops = {
> -    .old_mmio = {
> -        .read = { nvram_readb, nvram_readw, nvram_readl, },
> -        .write = { nvram_writeb, nvram_writew, nvram_writel, },
> -    },
> -    .endianness = DEVICE_NATIVE_ENDIAN,
> +    .read = nvram_read,
> +    .write = nvram_write,
> +    .impl.min_access_size = 1,
> +    .impl.max_access_size = 1,
> +    .valid.min_access_size = 1,
> +    .valid.max_access_size = 4,
> +    .endianness = DEVICE_BIG_ENDIAN,
>  };
>  
>  static const VMStateDescription vmstate_m48t59 = {
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors
  2018-08-02 18:06 [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors Peter Maydell
  2018-08-02 19:05 ` Philippe Mathieu-Daudé
@ 2018-08-03  7:22 ` Mark Cave-Ayland
  2018-08-20  9:52   ` Peter Maydell
  1 sibling, 1 reply; 4+ messages in thread
From: Mark Cave-Ayland @ 2018-08-03  7:22 UTC (permalink / raw)
  To: Peter Maydell, qemu-devel; +Cc: patches

On 02/08/18 19:06, Peter Maydell wrote:

> Move the m48t59 device away from using old_mmio MemoryRegionOps
> accessors.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> Tested with 'make check' and by booting a sparc guest.
> 
>   hw/timer/m48t59.c | 59 +++++++++--------------------------------------
>   1 file changed, 11 insertions(+), 48 deletions(-)
> 
> diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
> index f2991762ab0..ca3ed445de7 100644
> --- a/hw/timer/m48t59.c
> +++ b/hw/timer/m48t59.c
> @@ -493,66 +493,29 @@ static uint64_t NVRAM_readb(void *opaque, hwaddr addr, unsigned size)
>       return retval;
>   }
>   
> -static void nvram_writeb (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, value & 0xff);
> -}
> -
> -static void nvram_writew (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, (value >> 8) & 0xff);
> -    m48t59_write(NVRAM, addr + 1, value & 0xff);
> -}
> -
> -static void nvram_writel (void *opaque, hwaddr addr, uint32_t value)
> -{
> -    M48t59State *NVRAM = opaque;
> -
> -    m48t59_write(NVRAM, addr, (value >> 24) & 0xff);
> -    m48t59_write(NVRAM, addr + 1, (value >> 16) & 0xff);
> -    m48t59_write(NVRAM, addr + 2, (value >> 8) & 0xff);
> -    m48t59_write(NVRAM, addr + 3, value & 0xff);
> -}
> -
> -static uint32_t nvram_readb (void *opaque, hwaddr addr)
> +static uint64_t nvram_read(void *opaque, hwaddr addr, unsigned size)
>   {
>       M48t59State *NVRAM = opaque;
>   
>       return m48t59_read(NVRAM, addr);
>   }
>   
> -static uint32_t nvram_readw (void *opaque, hwaddr addr)
> +static void nvram_write(void *opaque, hwaddr addr, uint64_t value,
> +                        unsigned size)
>   {
>       M48t59State *NVRAM = opaque;
> -    uint32_t retval;
>   
> -    retval = m48t59_read(NVRAM, addr) << 8;
> -    retval |= m48t59_read(NVRAM, addr + 1);
> -    return retval;
> -}
> -
> -static uint32_t nvram_readl (void *opaque, hwaddr addr)
> -{
> -    M48t59State *NVRAM = opaque;
> -    uint32_t retval;
> -
> -    retval = m48t59_read(NVRAM, addr) << 24;
> -    retval |= m48t59_read(NVRAM, addr + 1) << 16;
> -    retval |= m48t59_read(NVRAM, addr + 2) << 8;
> -    retval |= m48t59_read(NVRAM, addr + 3);
> -    return retval;
> +    return m48t59_write(NVRAM, addr, value);
>   }
>   
>   static const MemoryRegionOps nvram_ops = {
> -    .old_mmio = {
> -        .read = { nvram_readb, nvram_readw, nvram_readl, },
> -        .write = { nvram_writeb, nvram_writew, nvram_writel, },
> -    },
> -    .endianness = DEVICE_NATIVE_ENDIAN,
> +    .read = nvram_read,
> +    .write = nvram_write,
> +    .impl.min_access_size = 1,
> +    .impl.max_access_size = 1,
> +    .valid.min_access_size = 1,
> +    .valid.max_access_size = 4,
> +    .endianness = DEVICE_BIG_ENDIAN,
>   };
>   
>   static const VMStateDescription vmstate_m48t59 = {

Looks good to me after some quick boot tests on SPARC, SPARC64 and 40p, so:

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>


ATB,

Mark.

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors
  2018-08-03  7:22 ` Mark Cave-Ayland
@ 2018-08-20  9:52   ` Peter Maydell
  0 siblings, 0 replies; 4+ messages in thread
From: Peter Maydell @ 2018-08-20  9:52 UTC (permalink / raw)
  To: Mark Cave-Ayland; +Cc: QEMU Developers, patches@linaro.org

On 3 August 2018 at 08:22, Mark Cave-Ayland
<mark.cave-ayland@ilande.co.uk> wrote:
> On 02/08/18 19:06, Peter Maydell wrote:
>
>> Move the m48t59 device away from using old_mmio MemoryRegionOps
>> accessors.
>>
>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
>> ---

>
> Looks good to me after some quick boot tests on SPARC, SPARC64 and 40p, so:
>
> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Thanks. I'll put this in via target-arm unless somebody has a
better route for it.

-- PMM

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2018-08-20 10:04 UTC | newest]

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2018-08-02 18:06 [Qemu-devel] [PATCH] hw/timer/m48t59: Move away from old_mmio accessors Peter Maydell
2018-08-02 19:05 ` Philippe Mathieu-Daudé
2018-08-03  7:22 ` Mark Cave-Ayland
2018-08-20  9:52   ` Peter Maydell

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