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From: "Steffen Görtz" <contrib@steffen-goertz.de>
To: qemu-devel@nongnu.org
Cc: "Stefan Hajnoczi" <stefanha@gmail.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Jim Mussared" <jim@groklearning.com>,
	"Julia Suvorova" <jusual@mail.ru>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Thomas Huth" <thuth@redhat.com>,
	"Steffen Görtz" <contrib@steffen-goertz.de>
Subject: [Qemu-devel] [PATCH 5/7] tests/microbit-test: Add Tests for nRF51 GPIO
Date: Mon,  6 Aug 2018 12:01:12 +0200	[thread overview]
Message-ID: <20180806100114.21410-6-contrib@steffen-goertz.de> (raw)
In-Reply-To: <20180806100114.21410-1-contrib@steffen-goertz.de>

The test suite for the nRF51 GPIO peripheral for now
only tests initial state. Additionally a set of
tests testing an implementation detail of the model
are included.

Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
---
 tests/microbit-test.c | 96 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)

diff --git a/tests/microbit-test.c b/tests/microbit-test.c
index 9f83063cf3..cc36171734 100644
--- a/tests/microbit-test.c
+++ b/tests/microbit-test.c
@@ -33,6 +33,21 @@
 #define NVMC_ERASEPCR0      0x510
 #define NVMC_ERASEUICR      0x514
 
+#define GPIO_BASE         0x50000000
+#define GPIO_OUT          0x504
+#define GPIO_OUTSET       0x508
+#define GPIO_OUTCLR       0x50C
+#define GPIO_IN           0x510
+#define GPIO_DIR          0x514
+#define GPIO_DIRSET       0x518
+#define GPIO_DIRCLR       0x51C
+#define GPIO_CNF_START    0x700
+#define GPIO_CNF_END      0x77F
+#define GPIO_PINS 32
+
+#define GPIO_PULLDOWN 1
+#define GPIO_PULLUP 3
+
 
 static void fill_and_erase(hwaddr base, hwaddr size, uint32_t address_reg)
 {
@@ -109,6 +124,86 @@ static void test_nrf51_nvmc(void)
     }
 }
 
+static void test_nrf51_gpio(void)
+{
+    size_t i;
+    uint32_t actual, expected;
+
+    struct {
+        hwaddr addr;
+        uint32_t expected;
+    } reset_state[] = {
+            {GPIO_OUT, 0x00000000}, {GPIO_OUTSET, 0x00000000},
+            {GPIO_OUTCLR, 0x00000000}, {GPIO_IN, 0x00000000},
+            {GPIO_DIR, 0x00000000}, {GPIO_DIRSET, 0x00000000},
+            {GPIO_DIRCLR, 0x00000000}
+    };
+
+    /** Check reset state **/
+    for (i = 0; i < ARRAY_SIZE(reset_state); i++) {
+        expected = reset_state[i].expected;
+        actual = readl(GPIO_BASE + reset_state[i].addr);
+        g_assert_cmpuint(actual, ==, expected);
+    }
+
+    for (i = 0; i < GPIO_PINS; i++) {
+        expected = 0x00000002;
+        actual = readl(GPIO_BASE + GPIO_CNF_START + i * 4);
+        g_assert_cmpuint(actual, ==, expected);
+    }
+
+    /** Check dir bit consistency between dir and cnf **/
+    /* Check set via DIRSET */
+    expected = 0x80000001;
+    writel(GPIO_BASE + GPIO_DIRSET, expected);
+    actual = readl(GPIO_BASE + GPIO_DIR);
+    g_assert_cmpuint(actual, ==, expected);
+    actual = readl(GPIO_BASE + GPIO_CNF_START) & 0x01;
+    g_assert_cmpuint(actual, ==, 0x01);
+    actual = readl(GPIO_BASE + GPIO_CNF_END) & 0x01;
+    g_assert_cmpuint(actual, ==, 0x01);
+
+    /* Check clear via DIRCLR */
+    writel(GPIO_BASE + GPIO_DIRCLR, 0x80000001);
+    actual = readl(GPIO_BASE + GPIO_DIR);
+    g_assert_cmpuint(actual, ==, 0x00000000);
+    actual = readl(GPIO_BASE + GPIO_CNF_START) & 0x01;
+    g_assert_cmpuint(actual, ==, 0x00);
+    actual = readl(GPIO_BASE + GPIO_CNF_END) & 0x01;
+    g_assert_cmpuint(actual, ==, 0x00);
+
+    /* Check set via DIR */
+    expected = 0x80000001;
+    writel(GPIO_BASE + GPIO_DIR, expected);
+    actual = readl(GPIO_BASE + GPIO_DIR);
+    g_assert_cmpuint(actual, ==, expected);
+    actual = readl(GPIO_BASE + GPIO_CNF_START) & 0x01;
+    g_assert_cmpuint(actual, ==, 0x01);
+    actual = readl(GPIO_BASE + GPIO_CNF_END) & 0x01;
+    g_assert_cmpuint(actual, ==, 0x01);
+
+    /* Reset DIR */
+    writel(GPIO_BASE + GPIO_DIR, 0x00000000);
+
+    /* Check Input propagates */
+    g_assert_false(true);
+
+    /* Check pull-up working */
+    g_assert_false(true);
+
+    /* Check pull-down working */
+    g_assert_false(true);
+
+    /* Check Output propagates */
+    g_assert_false(true);
+
+    /* Check self-stimulation */
+    g_assert_false(true);
+
+    /* Check short-circuit */
+    g_assert_false(true);
+}
+
 int main(int argc, char **argv)
 {
     int ret;
@@ -118,6 +213,7 @@ int main(int argc, char **argv)
     global_qtest = qtest_startf("-machine microbit");
 
     qtest_add_func("/microbit/nrf51/nvmc", test_nrf51_nvmc);
+    qtest_add_func("/microbit/nrf51/gpio", test_nrf51_gpio);
 
     ret = g_test_run();
 
-- 
2.18.0

  parent reply	other threads:[~2018-08-06 10:01 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-08-06 10:01 [Qemu-devel] [PATCH 0/7] arm: nRF51 Devices and Microbit Support Steffen Görtz
2018-08-06 10:01 ` [Qemu-devel] [PATCH 1/7] hw/misc/nrf51_rng: Add NRF51 random number generator peripheral Steffen Görtz
2018-08-06 14:00   ` Stefan Hajnoczi
2018-08-16 15:45   ` Peter Maydell
2018-08-06 10:01 ` [Qemu-devel] [PATCH 2/7] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories Steffen Görtz
2018-08-06 16:09   ` Stefan Hajnoczi
2018-08-08  9:58     ` Steffen Görtz
2018-08-16 16:03   ` Peter Maydell
2018-08-21  8:31     ` Steffen Görtz
2018-08-06 10:01 ` [Qemu-devel] [PATCH 3/7] tests: Add bbc:microbit / nRF51 test suite Steffen Görtz
2018-08-08  9:09   ` Stefan Hajnoczi
2018-08-08  9:46     ` Julia Suvorova
2018-08-09 16:16       ` Stefan Hajnoczi
2018-08-06 10:01 ` [Qemu-devel] [PATCH 4/7] hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral Steffen Görtz
2018-08-08  9:11   ` Stefan Hajnoczi
2018-08-16 16:08   ` Peter Maydell
2018-08-06 10:01 ` Steffen Görtz [this message]
2018-08-09 16:14   ` [Qemu-devel] [PATCH 5/7] tests/microbit-test: Add Tests for nRF51 GPIO Stefan Hajnoczi
2018-08-06 10:01 ` [Qemu-devel] [PATCH 6/7] hw/timer/nrf51_timer: Add nRF51 Timer peripheral Steffen Görtz
2018-08-09 16:45   ` Stefan Hajnoczi
2018-08-06 10:01 ` [Qemu-devel] [PATCH 7/7] hw/display/led_matrix: Add LED matrix display device Steffen Görtz
2018-08-09 17:08   ` Stefan Hajnoczi
2018-08-06 10:09 ` [Qemu-devel] [PATCH 0/7] arm: nRF51 Devices and Microbit Support Peter Maydell
2018-08-06 10:31   ` Steffen Görtz
2018-08-16 16:10   ` Peter Maydell

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