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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH 10/13] target/arm: Add v8M stack checks for T32 load/store single
Date: Tue,  2 Oct 2018 17:35:53 +0100	[thread overview]
Message-ID: <20181002163556.10279-11-peter.maydell@linaro.org> (raw)
In-Reply-To: <20181002163556.10279-1-peter.maydell@linaro.org>

Add v8M stack checks for the instructions in the T32
"load/store single" encoding class: these are the
"immediate pre-indexed" and "immediate, post-indexed"
LDR and STR instructions.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 3fb378a492d..65df8d6975c 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11624,7 +11624,6 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
                     imm = -imm;
                     /* Fall through.  */
                 case 0xf: /* Pre-increment.  */
-                    tcg_gen_addi_i32(addr, addr, imm);
                     writeback = 1;
                     break;
                 default:
@@ -11636,6 +11635,28 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t insn)
 
         issinfo = writeback ? ISSInvalid : rs;
 
+        if (s->v8m_stackcheck && rn == 13 && writeback) {
+            /*
+             * Stackcheck. Here we know 'addr' is the current SP;
+             * if imm is +ve we're moving SP up, else down. It is
+             * UNKNOWN whether the limit check triggers when SP starts
+             * below the limit and ends up above it; we chose to do so.
+             */
+            if ((int32_t)imm < 0) {
+                TCGv_i32 newsp = tcg_temp_new_i32();
+
+                tcg_gen_addi_i32(newsp, addr, imm);
+                gen_helper_v8m_stackcheck(cpu_env, newsp);
+                tcg_temp_free_i32(newsp);
+            } else {
+                gen_helper_v8m_stackcheck(cpu_env, addr);
+            }
+        }
+
+        if (writeback && !postinc) {
+            tcg_gen_addi_i32(addr, addr, imm);
+        }
+
         if (insn & (1 << 20)) {
             /* Load.  */
             tmp = tcg_temp_new_i32();
-- 
2.19.0

  parent reply	other threads:[~2018-10-02 16:36 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-02 16:35 [Qemu-devel] [PATCH 00/13] target/arm: Implement v8M stack limit checks Peter Maydell
2018-10-02 16:35 ` [Qemu-devel] [PATCH 01/13] target/arm: Define new TBFLAG for v8M stack checking Peter Maydell
2018-10-03 19:51   ` Richard Henderson
2018-10-04 16:02   ` Philippe Mathieu-Daudé
2018-10-02 16:35 ` [Qemu-devel] [PATCH 02/13] target/arm: Define new EXCP type for v8M stack overflows Peter Maydell
2018-10-03  8:52   ` Philippe Mathieu-Daudé
2018-10-03 19:52   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 03/13] target/arm: Move v7m_using_psp() to internals.h Peter Maydell
2018-10-03  8:52   ` Philippe Mathieu-Daudé
2018-10-03 19:53   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 04/13] target/arm: Add v8M stack checks on ADD/SUB/MOV of SP Peter Maydell
2018-10-03 20:00   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 05/13] target/arm: Add some comments in Thumb decode Peter Maydell
2018-10-03 10:32   ` Philippe Mathieu-Daudé
2018-10-03 20:02   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 06/13] target/arm: Add v8M stack checks on exception entry Peter Maydell
2018-10-03  8:58   ` Philippe Mathieu-Daudé
2018-10-03 20:12   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 07/13] target/arm: Add v8M stack limit checks on NS function calls Peter Maydell
2018-10-03  9:02   ` Philippe Mathieu-Daudé
2018-10-03 20:14   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 08/13] target/arm: Add v8M stack checks for LDRD/STRD (imm) Peter Maydell
2018-10-03 14:38   ` Philippe Mathieu-Daudé
2018-10-03 20:16   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 09/13] target/arm: Add v8M stack checks for Thumb2 LDM/STM Peter Maydell
2018-10-03  9:08   ` Philippe Mathieu-Daudé
2018-10-03 20:17   ` Richard Henderson
2018-10-02 16:35 ` Peter Maydell [this message]
2018-10-03 10:44   ` [Qemu-devel] [PATCH 10/13] target/arm: Add v8M stack checks for T32 load/store single Philippe Mathieu-Daudé
2018-10-03 20:18   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 11/13] target/arm: Add v8M stack checks for Thumb push/pop Peter Maydell
2018-10-03  9:20   ` Philippe Mathieu-Daudé
2018-10-03 20:19   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 12/13] target/arm: Add v8M stack checks for VLDM/VSTM Peter Maydell
2018-10-03  9:55   ` Philippe Mathieu-Daudé
2018-10-03 20:20   ` Richard Henderson
2018-10-03 20:21   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 13/13] target/arm: Add v8M stack checks for MSR to SP_NS Peter Maydell
2018-10-03 10:18   ` Philippe Mathieu-Daudé
2018-10-03 20:22   ` Richard Henderson

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