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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH 02/13] target/arm: Define new EXCP type for v8M stack overflows
Date: Tue,  2 Oct 2018 17:35:45 +0100	[thread overview]
Message-ID: <20181002163556.10279-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20181002163556.10279-1-peter.maydell@linaro.org>

Define EXCP_STKOF, and arrange for it to cause us to take
a UsageFault with CFSR.STKOF set.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu.h    | 2 ++
 target/arm/helper.c | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index d2c1d005ed7..318792823b9 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -56,6 +56,7 @@
 #define EXCP_SEMIHOST       16   /* semihosting call */
 #define EXCP_NOCP           17   /* v7M NOCP UsageFault */
 #define EXCP_INVSTATE       18   /* v7M INVSTATE UsageFault */
+#define EXCP_STKOF          19   /* v8M STKOF UsageFault */
 /* NB: add new EXCP_ defines to the array in arm_log_exception() too */
 
 #define ARMV7M_EXCP_RESET   1
@@ -1380,6 +1381,7 @@ FIELD(V7M_CFSR, UNDEFINSTR, 16 + 0, 1)
 FIELD(V7M_CFSR, INVSTATE, 16 + 1, 1)
 FIELD(V7M_CFSR, INVPC, 16 + 2, 1)
 FIELD(V7M_CFSR, NOCP, 16 + 3, 1)
+FIELD(V7M_CFSR, STKOF, 16 + 4, 1)
 FIELD(V7M_CFSR, UNALIGNED, 16 + 8, 1)
 FIELD(V7M_CFSR, DIVBYZERO, 16 + 9, 1)
 
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 6ed8631dbee..c303dc453f1 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7511,6 +7511,7 @@ static void arm_log_exception(int idx)
             [EXCP_SEMIHOST] = "Semihosting call",
             [EXCP_NOCP] = "v7M NOCP UsageFault",
             [EXCP_INVSTATE] = "v7M INVSTATE UsageFault",
+            [EXCP_STKOF] = "v8M STKOF UsageFault",
         };
 
         if (idx >= 0 && idx < ARRAY_SIZE(excnames)) {
@@ -7666,6 +7667,10 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
         armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure);
         env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_INVSTATE_MASK;
         break;
+    case EXCP_STKOF:
+        armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE, env->v7m.secure);
+        env->v7m.cfsr[env->v7m.secure] |= R_V7M_CFSR_STKOF_MASK;
+        break;
     case EXCP_SWI:
         /* The PC already points to the next instruction.  */
         armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC, env->v7m.secure);
-- 
2.19.0

  parent reply	other threads:[~2018-10-02 16:36 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-02 16:35 [Qemu-devel] [PATCH 00/13] target/arm: Implement v8M stack limit checks Peter Maydell
2018-10-02 16:35 ` [Qemu-devel] [PATCH 01/13] target/arm: Define new TBFLAG for v8M stack checking Peter Maydell
2018-10-03 19:51   ` Richard Henderson
2018-10-04 16:02   ` Philippe Mathieu-Daudé
2018-10-02 16:35 ` Peter Maydell [this message]
2018-10-03  8:52   ` [Qemu-devel] [PATCH 02/13] target/arm: Define new EXCP type for v8M stack overflows Philippe Mathieu-Daudé
2018-10-03 19:52   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 03/13] target/arm: Move v7m_using_psp() to internals.h Peter Maydell
2018-10-03  8:52   ` Philippe Mathieu-Daudé
2018-10-03 19:53   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 04/13] target/arm: Add v8M stack checks on ADD/SUB/MOV of SP Peter Maydell
2018-10-03 20:00   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 05/13] target/arm: Add some comments in Thumb decode Peter Maydell
2018-10-03 10:32   ` Philippe Mathieu-Daudé
2018-10-03 20:02   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 06/13] target/arm: Add v8M stack checks on exception entry Peter Maydell
2018-10-03  8:58   ` Philippe Mathieu-Daudé
2018-10-03 20:12   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 07/13] target/arm: Add v8M stack limit checks on NS function calls Peter Maydell
2018-10-03  9:02   ` Philippe Mathieu-Daudé
2018-10-03 20:14   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 08/13] target/arm: Add v8M stack checks for LDRD/STRD (imm) Peter Maydell
2018-10-03 14:38   ` Philippe Mathieu-Daudé
2018-10-03 20:16   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 09/13] target/arm: Add v8M stack checks for Thumb2 LDM/STM Peter Maydell
2018-10-03  9:08   ` Philippe Mathieu-Daudé
2018-10-03 20:17   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 10/13] target/arm: Add v8M stack checks for T32 load/store single Peter Maydell
2018-10-03 10:44   ` Philippe Mathieu-Daudé
2018-10-03 20:18   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 11/13] target/arm: Add v8M stack checks for Thumb push/pop Peter Maydell
2018-10-03  9:20   ` Philippe Mathieu-Daudé
2018-10-03 20:19   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 12/13] target/arm: Add v8M stack checks for VLDM/VSTM Peter Maydell
2018-10-03  9:55   ` Philippe Mathieu-Daudé
2018-10-03 20:20   ` Richard Henderson
2018-10-03 20:21   ` Richard Henderson
2018-10-02 16:35 ` [Qemu-devel] [PATCH 13/13] target/arm: Add v8M stack checks for MSR to SP_NS Peter Maydell
2018-10-03 10:18   ` Philippe Mathieu-Daudé
2018-10-03 20:22   ` Richard Henderson

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