From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>,
QEMU Developers <qemu-devel@nongnu.org>,
qemu-arm <qemu-arm@nongnu.org>,
Richard Henderson <richard.henderson@linaro.org>,
KONRAD Frederic <frederic.konrad@adacore.com>,
Alistair Francis <alistair@alistair23.me>,
Francisco Iglesias <frasse.iglesias@gmail.com>,
figlesia@xilinx.com, Stefano Stabellini <sstabellini@kernel.org>,
Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Subject: Re: [Qemu-devel] [PATCH v1 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion
Date: Mon, 8 Oct 2018 21:55:21 +0200 [thread overview]
Message-ID: <20181008195521.GB4229@toto> (raw)
In-Reply-To: <CAFEAcA9_EOFV=5i-4S1GWVgewAa89hJDTegnf9Ot3w7rfkZWYA@mail.gmail.com>
On Mon, Oct 08, 2018 at 01:30:20PM +0100, Peter Maydell wrote:
> On 3 October 2018 at 16:07, Edgar E. Iglesias <edgar.iglesias@gmail.com> wrote:
> > From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
> >
> > Add support for selecting the Memory Region that the GEM
> > will do DMA to.
> >
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
> > ---
> > hw/net/cadence_gem.c | 63 ++++++++++++++++++++++++++++----------------
> > include/hw/net/cadence_gem.h | 2 ++
> > 2 files changed, 43 insertions(+), 22 deletions(-)
> >
> > diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
> > index 759c1d7..ab02515 100644
> > --- a/hw/net/cadence_gem.c
> > +++ b/hw/net/cadence_gem.c
> > @@ -28,6 +28,7 @@
> > #include "hw/net/cadence_gem.h"
> > #include "qapi/error.h"
> > #include "qemu/log.h"
> > +#include "sysemu/dma.h"
> > #include "net/checksum.h"
> >
> > #ifdef CADENCE_GEM_ERR_DEBUG
> > @@ -835,9 +836,9 @@ static void gem_get_rx_desc(CadenceGEMState *s, int q)
> > {
> > DB_PRINT("read descriptor 0x%x\n", (unsigned)s->rx_desc_addr[q]);
> > /* read current descriptor */
> > - cpu_physical_memory_read(s->rx_desc_addr[q],
> > - (uint8_t *)s->rx_desc[q],
> > - sizeof(uint32_t) * gem_get_desc_len(s, true));
> > + address_space_read(s->dma_as, s->rx_desc_addr[q], MEMTXATTRS_UNSPECIFIED,
> > + (uint8_t *)s->rx_desc[q],
> > + sizeof(uint32_t) * gem_get_desc_len(s, true));
>
> At some point you might want to add support for handling "descriptor
> read/write failed", incidentally: address_space_read/write return a
> MemTxResult which you can check for != MEMTX_OK.
Yes, the GEM can report those errors to SW so that's a nice feature to follow up with.
Thanks,
Edgar
next prev parent reply other threads:[~2018-10-08 19:55 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-03 15:07 [Qemu-devel] [PATCH v1 00/12] arm: Add first models of Xilinx Versal SoC Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 01/12] net: cadence_gem: Disable TSU feature bit Edgar E. Iglesias
2018-10-04 17:36 ` Alistair Francis
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 02/12] net: cadence_gem: Announce availability of priority queues Edgar E. Iglesias
2018-10-04 22:14 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 03/12] net: cadence_gem: Use uint32_t for 32bit descriptor words Edgar E. Iglesias
2018-10-04 22:16 ` Alistair
2018-10-05 23:09 ` Philippe Mathieu-Daudé
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 04/12] net: cadence_gem: Add macro with max number of " Edgar E. Iglesias
2018-10-04 22:16 ` Alistair
2018-10-05 23:10 ` Philippe Mathieu-Daudé
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 05/12] net: cadence_gem: Add support for extended descriptors Edgar E. Iglesias
2018-10-04 22:29 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 06/12] net: cadence_gem: Add support for selecting the DMA MemoryRegion Edgar E. Iglesias
2018-10-05 22:35 ` Alistair
2018-10-05 23:14 ` Philippe Mathieu-Daudé
2018-10-08 12:26 ` Peter Maydell
2018-10-08 12:24 ` Peter Maydell
2018-10-08 19:54 ` Edgar E. Iglesias
2018-10-08 12:30 ` Peter Maydell
2018-10-08 19:55 ` Edgar E. Iglesias [this message]
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 07/12] net: cadence_gem: Implement support for 64bit descriptor addresses Edgar E. Iglesias
2018-10-05 23:12 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 08/12] net: cadence_gem: Announce 64bit addressing support Edgar E. Iglesias
2018-10-04 22:32 ` Alistair
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 09/12] target-arm: powerctl: Enable HVC when starting CPUs to EL2 Edgar E. Iglesias
2018-10-08 12:41 ` Peter Maydell
2018-10-08 19:56 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 10/12] target/arm: Add the Cortex-A72 Edgar E. Iglesias
2018-10-08 13:10 ` Peter Maydell
2018-10-08 21:34 ` Edgar E. Iglesias
2018-10-09 9:30 ` Peter Maydell
2018-10-09 13:17 ` Edgar E. Iglesias
2018-10-09 13:40 ` Laurent Desnogues
2018-10-09 14:56 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 11/12] hw/arm: versal: Add a model of Xilinx Versal SoC Edgar E. Iglesias
2018-10-05 23:21 ` Philippe Mathieu-Daudé
2018-10-08 13:19 ` Peter Maydell
2018-10-08 22:25 ` Edgar E. Iglesias
2018-10-03 15:07 ` [Qemu-devel] [PATCH v1 12/12] hw/arm: versal: Add a virtual Xilinx Versal board Edgar E. Iglesias
2018-10-08 14:08 ` [Qemu-devel] [PATCH v1 00/12] arm: Add first models of Xilinx Versal SoC Peter Maydell
2018-10-09 12:57 ` Edgar E. Iglesias
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