From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH 02/10] target/arm: Make switch_mode() file-local
Date: Fri, 12 Oct 2018 15:42:27 +0100 [thread overview]
Message-ID: <20181012144235.19646-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20181012144235.19646-1-peter.maydell@linaro.org>
The switch_mode() function is defined in target/arm/helper.c and used
only in that file and nowhere else, so we can make it file-local
rather than global.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/internals.h | 1 -
target/arm/helper.c | 6 ++++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/arm/internals.h b/target/arm/internals.h
index abe4d73b59c..d4b1973efa1 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -145,7 +145,6 @@ static inline int bank_number(int mode)
g_assert_not_reached();
}
-void switch_mode(CPUARMState *, int);
void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu);
void arm_translate_init(void);
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0fa5ac0450f..0253a971099 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -56,6 +56,8 @@ static void v8m_security_lookup(CPUARMState *env, uint32_t address,
V8M_SAttributes *sattrs);
#endif
+static void switch_mode(CPUARMState *env, int mode);
+
static int vfp_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg)
{
int nregs;
@@ -6313,7 +6315,7 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t addr, uint32_t op)
return 0;
}
-void switch_mode(CPUARMState *env, int mode)
+static void switch_mode(CPUARMState *env, int mode)
{
ARMCPU *cpu = arm_env_get_cpu(env);
@@ -6335,7 +6337,7 @@ void aarch64_sync_64_to_32(CPUARMState *env)
#else
-void switch_mode(CPUARMState *env, int mode)
+static void switch_mode(CPUARMState *env, int mode)
{
int old_mode;
int i;
--
2.19.0
next prev parent reply other threads:[~2018-10-12 14:42 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-12 14:42 [Qemu-devel] [PATCH 00/10] target/arm: more HCR bits, improve syndrome reporting Peter Maydell
2018-10-12 14:42 ` [Qemu-devel] [PATCH 01/10] target/arm: Improve debug logging of AArch32 exception return Peter Maydell
2018-10-14 16:12 ` Richard Henderson
2018-10-12 14:42 ` Peter Maydell [this message]
2018-10-14 16:13 ` [Qemu-devel] [PATCH 02/10] target/arm: Make switch_mode() file-local Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 03/10] target/arm: Implement HCR.FB Peter Maydell
2018-10-14 16:21 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 04/10] target/arm: Implement HCR.DC Peter Maydell
2018-10-14 16:26 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 05/10] target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set Peter Maydell
2018-10-14 16:34 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 06/10] target/arm: Implement HCR.VI and VF Peter Maydell
2018-10-15 15:35 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 07/10] target/arm: Implement HCR.PTW Peter Maydell
2018-10-15 15:38 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 08/10] target/arm: New utility function to extract EC from syndrome Peter Maydell
2018-10-15 15:38 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 09/10] target/arm: Get IL bit correct for v7 syndrome values Peter Maydell
2018-10-15 15:41 ` Richard Henderson
2018-10-12 14:42 ` [Qemu-devel] [PATCH 10/10] target/arm: Report correct syndrome for FP/SIMD traps to Hyp mode Peter Maydell
2018-10-15 16:00 ` Richard Henderson
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