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From: Aaron Lindsay <aclindsa@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>,
	Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
	Alistair Francis <alistair.francis@xilinx.com>,
	Wei Huang <wei@redhat.com>,
	Peter Crosthwaite <crosthwaite.peter@gmail.com>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Michael Spradling <mspradli@codeaurora.org>,
	Digant Desai <digantd@codeaurora.org>
Subject: Re: [Qemu-devel] [PATCH v6 00/14] More fully implement ARM PMUv3
Date: Tue, 16 Oct 2018 08:46:49 -0400	[thread overview]
Message-ID: <20181016124648.GN3671@okra.localdomain> (raw)
In-Reply-To: <CAFEAcA9cACQa7A8VUdfuSk-FcmFeHu+4x5m7HDE1A-+LYcwvXA@mail.gmail.com>

On Oct 16 13:01, Peter Maydell wrote:
> On 10 October 2018 at 21:37, Aaron Lindsay <aclindsa@gmail.com> wrote:
> > The ARM PMU implementation currently contains a basic cycle counter, but
> > it is often useful to gather counts of other events, filter them based
> > on execution mode, and/or be notified on counter overflow. These patches
> > flesh out the implementations of various PMU registers including
> > PM[X]EVCNTR and PM[X]EVTYPER, add a struct definition to represent
> > arbitrary counter types, implement mode filtering, send interrupts on
> > counter overflow, and add instruction, cycle, and software increment
> > events.
> >
> > Since v5 [1] I have:
> > * Taken a first pass at addressing migration
> > * Restructured the list of supported events, and ensured they're all
> >   initialized
> > * Fixed aliasing for PMOVSSET
> > * Added ARM_CP_IO for PMINTENCLR and PMINTENCLR_EL1
> > * Addressed a few non-code issues (comment style, patch staging,
> >   spelling, etc.)
> >
> > [1] - https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg06830.html
> >
> > Aaron Lindsay (14):
> >   target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly
> >     doing IO
> >   target/arm: Mask PMOVSR writes based on supported counters
> 
> Hi; Richard has reviewed most of this series and suggested some
> changes (thanks!); I'll just take these first two patches into
> target-arm.next, since they're simple fixes that have been reviewed.

Thanks, Peter and Richard!

Is anyone willing to take a glance at the final patch in this series,
"target/arm: Send interrupts on PMU counter overflow", before my next
iteration? I'm particularly interested in a review of the approach I
took for detecting overflow.

-Aaron

  reply	other threads:[~2018-10-16 12:47 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-10 20:37 [Qemu-devel] [PATCH v6 00/14] More fully implement ARM PMUv3 Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 01/14] target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO Aaron Lindsay
2018-10-15 19:19   ` Richard Henderson
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 02/14] target/arm: Mask PMOVSR writes based on supported counters Aaron Lindsay
2018-10-15 19:27   ` Richard Henderson
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 03/14] migration: Add post_save function to VMStateDescription Aaron Lindsay
2018-10-15 19:36   ` Richard Henderson
2018-10-16  8:21     ` Dr. David Alan Gilbert
2018-10-16 13:55       ` Aaron Lindsay
2018-10-16 14:06         ` Dr. David Alan Gilbert
2018-10-16 14:41           ` Aaron Lindsay
2018-10-16 14:43             ` Dr. David Alan Gilbert
2018-10-17 12:07           ` Juan Quintela
2018-10-17 12:05     ` Juan Quintela
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 04/14] target/arm: Swap PMU values before/after migrations Aaron Lindsay
2018-10-15 19:45   ` Richard Henderson
2018-10-15 20:44     ` Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 05/14] target/arm: Reorganize PMCCNTR accesses Aaron Lindsay
2018-10-15 19:50   ` Richard Henderson
2018-10-15 20:19     ` Richard Henderson
2018-10-15 20:30       ` Aaron Lindsay
2018-10-15 20:47         ` Richard Henderson
2018-10-15 20:29     ` Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 06/14] target/arm: Filter cycle counter based on PMCCFILTR_EL0 Aaron Lindsay
2018-10-15 20:51   ` Richard Henderson
     [not found]     ` <20181016122542.GM3671@okra.localdomain>
2018-10-16 15:26       ` Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 07/14] target/arm: Allow AArch32 access for PMCCFILTR Aaron Lindsay
2018-10-15 21:06   ` Richard Henderson
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 08/14] target/arm: Implement PMOVSSET Aaron Lindsay
2018-10-15 21:26   ` Richard Henderson
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 09/14] target/arm: Add array for supported PMU events, generate PMCEID[01] Aaron Lindsay
2018-10-15 21:35   ` Richard Henderson
2018-10-16  9:55     ` Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 10/14] target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Aaron Lindsay
2018-10-17  0:02   ` Richard Henderson
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 11/14] target/arm: PMU: Add instruction and cycle events Aaron Lindsay
2018-10-17  0:04   ` Richard Henderson
2018-10-17 19:47     ` Aaron Lindsay
2018-10-17 21:12       ` Richard Henderson
2018-10-18 16:20         ` Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 12/14] target/arm: PMU: Set PMCR.N to 4 Aaron Lindsay
2018-10-17  0:09   ` Richard Henderson
2018-10-17 19:20     ` Aaron Lindsay
2018-10-17 19:34       ` Richard Henderson
2018-10-17 20:25         ` Aaron Lindsay
2018-10-17 21:14           ` Richard Henderson
2018-10-18 10:20             ` Peter Maydell
2018-10-18 19:55             ` Aaron Lindsay
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 13/14] target/arm: Implement PMSWINC Aaron Lindsay
2018-10-17  0:15   ` Richard Henderson
2018-10-10 20:37 ` [Qemu-devel] [PATCH v6 14/14] target/arm: Send interrupts on PMU counter overflow Aaron Lindsay
2018-10-16 12:01 ` [Qemu-devel] [PATCH v6 00/14] More fully implement ARM PMUv3 Peter Maydell
2018-10-16 12:46   ` Aaron Lindsay [this message]
2018-10-16 17:29     ` Richard Henderson

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