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Date: Tue, 16 Oct 2018 11:12:54 -0400
From: "Emilio G. Cota" <cota@braap.org>
Message-ID: <20181016151254.GA4169@flamenco>
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	<4f8df676-f854-e7fe-afed-51099a8abffe@linaro.org>
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Subject: Re: [Qemu-devel] [PATCH v3 4/4] cputlb: read CPUTLBEntry.addr_write
 atomically
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To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org, Alex =?iso-8859-1?Q?Benn=E9e?= <alex.bennee@linaro.org>

On Tue, Oct 16, 2018 at 08:03:03 +0200, Paolo Bonzini wrote:
> On 16/10/2018 04:52, Richard Henderson wrote:
> > On 10/5/18 2:14 PM, Emilio G. Cota wrote:
> >> -    target_ulong tlb_addr = env->tlb_table[mmu_idx][index].addr_write;
> >> +    target_ulong tlb_addr =
> >> +        atomic_read(&env->tlb_table[mmu_idx][index].addr_write);
> > 
> > This fails for 32-bit hosts emulating 64-bit hosts.
> > I think you need a separate helper function.  Perhaps
> > 
> > static inline target_ulong tlb_addr_write(CPUTLBEntry *ent)
> > {
> > #if TCG_OVERSIZED_GUEST
> >     return ent->addr_write;
> > #else
> >     return atomic_read(&ent->addr_write);
> > #endif
> > }

Ouch, yes.

> Or just atomic_read__nocheck.

I prefer special-casing oversized guests, otherwise we risk having
compile-time errors -- like the ones we got on mingw 32-bit when
not checking for CONFIG_ATOMIC64.

> > I'm going to drop this patch from my queue for now.
> > We can fix it up this week some time.

Sounds good. I'll send a patch on top of your current tcg-next
to avoid conflicts.

Thanks,

		Emilio