From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v4 2/8] target/arm: V8M should not imply V7VE
Date: Tue, 16 Oct 2018 15:31:09 -0700 [thread overview]
Message-ID: <20181016223115.24100-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20181016223115.24100-1-richard.henderson@linaro.org>
Instantiating mps2-an505 (cortex-m33) will fail make check when
V7VE asserts that ID_ISAR0.Divide includes ARM division. It is
also wrong to include ARM_FEATURE_LPAE.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4f6756a4e2..12e6273d60 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -814,7 +814,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
/* Some features automatically imply others: */
if (arm_feature(env, ARM_FEATURE_V8)) {
- set_feature(env, ARM_FEATURE_V7VE);
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ set_feature(env, ARM_FEATURE_V7);
+ } else {
+ set_feature(env, ARM_FEATURE_V7VE);
+ }
}
if (arm_feature(env, ARM_FEATURE_V7VE)) {
/* v7 Virtualization Extensions. In real hardware this implies
--
2.17.2
next prev parent reply other threads:[~2018-10-16 22:31 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-16 22:31 [Qemu-devel] [PATCH v4 0/8] target/arm: Rely on id regs instead of features Richard Henderson
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 1/8] target/arm: Move some system registers into a substructure Richard Henderson
2018-10-19 12:04 ` Philippe Mathieu-Daudé
2018-10-19 15:28 ` Richard Henderson
2018-10-16 22:31 ` Richard Henderson [this message]
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 3/8] target/arm: Convert v8 extensions from feature bits to isar tests Richard Henderson
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 4/8] target/arm: Convert division from feature bits to isar0 tests Richard Henderson
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 5/8] target/arm: Convert jazelle from feature bit to isar1 test Richard Henderson
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 6/8] target/arm: Convert t32ee from feature bit to isar3 test Richard Henderson
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 7/8] target/arm: Convert sve from feature bit to aa64pfr0 test Richard Henderson
2018-10-16 22:31 ` [Qemu-devel] [PATCH v4 8/8] target/arm: Convert v8.2-fp16 " Richard Henderson
2018-10-19 10:38 ` [Qemu-devel] [PATCH v4 0/8] target/arm: Rely on id regs instead of features Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181016223115.24100-3-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).