From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL v2 00/21] tcg patch queue
Date: Thu, 18 Oct 2018 23:06:35 -0700 [thread overview]
Message-ID: <20181019060656.7968-1-richard.henderson@linaro.org> (raw)
Changes since v1:
* Added QEMU_ERROR to wrap __attribute__((error)) -- patch 12.
r~
The following changes since commit 77f7c747193662edfadeeb3118d63eed0eac51a6:
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging (2018-10-18 13:40:19 +0100)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tcg-20181018
for you to fetch changes up to 403f290c0603f35f2d09c982bf5549b6d0803ec1:
cputlb: read CPUTLBEntry.addr_write atomically (2018-10-18 19:46:53 -0700)
----------------------------------------------------------------
Queued tcg patches.
----------------------------------------------------------------
Emilio G. Cota (10):
tcg: access cpu->icount_decr.u16.high with atomics
tcg: fix use of uninitialized variable under CONFIG_PROFILER
tcg: plug holes in struct TCGProfile
tcg: distribute tcg_time into TCG contexts
target/alpha: remove tlb_flush from alpha_cpu_initfn
target/unicore32: remove tlb_flush from uc32_init_fn
exec: introduce tlb_init
cputlb: fix assert_cpu_is_self macro
cputlb: serialize tlb updates with env->tlb_lock
cputlb: read CPUTLBEntry.addr_write atomically
Richard Henderson (11):
tcg: Implement CPU_LOG_TB_NOCHAIN during expansion
tcg: Add tlb_index and tlb_entry helpers
tcg: Split CONFIG_ATOMIC128
target/i386: Convert to HAVE_CMPXCHG128
target/arm: Convert to HAVE_CMPXCHG128
target/arm: Check HAVE_CMPXCHG128 at translate time
target/ppc: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128
target/s390x: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128
target/s390x: Split do_cdsg, do_lpq, do_stpq
target/s390x: Skip wout, cout helpers if op helper does not return
target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128 at translate
accel/tcg/atomic_template.h | 20 +++-
accel/tcg/softmmu_template.h | 64 +++++-----
include/exec/cpu-defs.h | 3 +
include/exec/cpu_ldst.h | 30 ++++-
include/exec/cpu_ldst_template.h | 25 ++--
include/exec/exec-all.h | 8 ++
include/qemu/atomic128.h | 153 ++++++++++++++++++++++++
include/qemu/compiler.h | 11 ++
include/qemu/timer.h | 1 -
target/ppc/helper.h | 2 +-
tcg/tcg.h | 20 ++--
accel/tcg/cpu-exec.c | 2 +-
accel/tcg/cputlb.c | 235 +++++++++++++++++++-----------------
accel/tcg/tcg-all.c | 2 +-
accel/tcg/translate-all.c | 2 +-
accel/tcg/user-exec.c | 5 +-
cpus.c | 3 +-
exec.c | 1 +
monitor.c | 13 +-
qom/cpu.c | 2 +-
target/alpha/cpu.c | 1 -
target/arm/helper-a64.c | 251 +++++++++++++++++++--------------------
target/arm/translate-a64.c | 38 +++---
target/i386/mem_helper.c | 9 +-
target/ppc/mem_helper.c | 33 ++++-
target/ppc/translate.c | 115 +++++++++---------
target/s390x/mem_helper.c | 202 +++++++++++++++----------------
target/s390x/translate.c | 45 +++++--
target/unicore32/cpu.c | 2 -
tcg/tcg-op.c | 9 +-
tcg/tcg.c | 25 +++-
configure | 19 +++
32 files changed, 839 insertions(+), 512 deletions(-)
create mode 100644 include/qemu/atomic128.h
next reply other threads:[~2018-10-19 6:07 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-19 6:06 Richard Henderson [this message]
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 01/21] tcg: Implement CPU_LOG_TB_NOCHAIN during expansion Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 02/21] tcg: access cpu->icount_decr.u16.high with atomics Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 03/21] tcg: fix use of uninitialized variable under CONFIG_PROFILER Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 04/21] tcg: plug holes in struct TCGProfile Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 05/21] tcg: distribute tcg_time into TCG contexts Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 06/21] target/alpha: remove tlb_flush from alpha_cpu_initfn Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 07/21] target/unicore32: remove tlb_flush from uc32_init_fn Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 08/21] exec: introduce tlb_init Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 09/21] cputlb: fix assert_cpu_is_self macro Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 10/21] cputlb: serialize tlb updates with env->tlb_lock Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 11/21] tcg: Add tlb_index and tlb_entry helpers Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 12/21] tcg: Split CONFIG_ATOMIC128 Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 13/21] target/i386: Convert to HAVE_CMPXCHG128 Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 14/21] target/arm: " Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 15/21] target/arm: Check HAVE_CMPXCHG128 at translate time Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 16/21] target/ppc: Convert to HAVE_CMPXCHG128 and HAVE_ATOMIC128 Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 17/21] target/s390x: " Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 18/21] target/s390x: Split do_cdsg, do_lpq, do_stpq Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 19/21] target/s390x: Skip wout, cout helpers if op helper does not return Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 20/21] target/s390x: Check HAVE_ATOMIC128 and HAVE_CMPXCHG128 at translate Richard Henderson
2018-10-19 6:06 ` [Qemu-devel] [PULL v2 21/21] cputlb: read CPUTLBEntry.addr_write atomically Richard Henderson
2018-10-19 18:01 ` [Qemu-devel] [PULL v2 00/21] tcg patch queue Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181019060656.7968-1-richard.henderson@linaro.org \
--to=richard.henderson@linaro.org \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).