From: Peter Xu <peterx@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: "Singh, Brijesh" <brijesh.singh@amd.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
"Lendacky, Thomas" <Thomas.Lendacky@amd.com>,
"Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
Subject: Re: [Qemu-devel] [PATCH v5 0/9] x86_iommu/amd: add interrupt remap support
Date: Mon, 22 Oct 2018 10:47:37 +0100 [thread overview]
Message-ID: <20181022094737.GI32717@xz-x1> (raw)
In-Reply-To: <20181019122756-mutt-send-email-mst@kernel.org>
On Fri, Oct 19, 2018 at 12:28:20PM -0400, Michael S. Tsirkin wrote:
> It looks good to me, I am merging it.
Hi, Michael,
Would you like to consider taking some of the other IOMMU fixes into
your next pull too altogether? They are:
[PATCH v4 0/2] intel_iommu: better handling of dmar state switch
[PATCH v3 0/2] intel_iommu: handle invalid ce for shadow sync
For each of the series, there should be two r-bs already.
Thanks,
--
Peter Xu
prev parent reply other threads:[~2018-10-22 9:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-01 19:44 [Qemu-devel] [PATCH v5 0/9] x86_iommu/amd: add interrupt remap support Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 1/9] x86_iommu: move the kernel-irqchip check in common code Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 2/9] x86_iommu: move vtd_generate_msi_message in common file Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 3/9] x86_iommu/amd: remove V=1 check from amdvi_validate_dte() Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 4/9] x86_iommu/amd: make the address space naming consistent with intel-iommu Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 5/9] x86_iommu/amd: Prepare for interrupt remap support Singh, Brijesh
2018-10-08 5:53 ` Peter Xu
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 6/9] x86_iommu/amd: Add interrupt remap support when VAPIC is not enabled Singh, Brijesh
2018-10-08 5:55 ` Peter Xu
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 7/9] i386: acpi: add IVHD device entry for IOAPIC Singh, Brijesh
2018-10-01 19:44 ` [Qemu-devel] [PATCH v5 9/9] x86_iommu/amd: Enable Guest virtual APIC support Singh, Brijesh
2018-10-19 14:05 ` [Qemu-devel] [PATCH v5 0/9] x86_iommu/amd: add interrupt remap support Singh, Brijesh
2018-10-19 16:28 ` Michael S. Tsirkin
2018-10-22 9:47 ` Peter Xu [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181022094737.GI32717@xz-x1 \
--to=peterx@redhat.com \
--cc=Suravee.Suthikulpanit@amd.com \
--cc=Thomas.Lendacky@amd.com \
--cc=brijesh.singh@amd.com \
--cc=ehabkost@redhat.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=rth@twiddle.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).