From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57990) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gFfnh-00031x-B2 for qemu-devel@nongnu.org; Thu, 25 Oct 2018 09:35:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gFfnf-00007x-BM for qemu-devel@nongnu.org; Thu, 25 Oct 2018 09:35:48 -0400 From: Eduardo Habkost Date: Thu, 25 Oct 2018 10:32:28 -0300 Message-Id: <20181025133301.16578-11-ehabkost@redhat.com> In-Reply-To: <20181025133301.16578-1-ehabkost@redhat.com> References: <20181025133301.16578-1-ehabkost@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL v2 10/43] hw/mips/gt64xxx_pci: Convert gt64120_reset() function into Device reset method List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell , qemu-devel@nongnu.org Cc: Paolo Bonzini , Alexander Graf , Rob Herring , libvir-list@redhat.com, Richard Henderson , David Gibson , Eric Blake , Igor Mammedov , qemu-arm@nongnu.org, "Edgar E. Iglesias" , Peter Crosthwaite , Markus Armbruster , Artyom Tarasenko , Mark Cave-Ayland , Eduardo Habkost , Michael Walle , Thomas Huth , Marcel Apfelbaum , Aleksandar Markovic , Aurelien Jarno , Alistair Francis , "Michael S. Tsirkin" , Jason Wang , Laurent Vivier , qemu-ppc@nongnu.org, Xiao Guangrong , Max Filippov , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= From: Philippe Mathieu-Daud=C3=A9 Convert the gt64120_reset() function into a proper Device reset method. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell Reviewed-by: C=C3=A9dric Le Goater Message-Id: <20181002212522.23303-8-f4bug@amsat.org> Signed-off-by: Eduardo Habkost --- hw/mips/gt64xxx_pci.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 24ad0ad024..dcd1a66329 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -992,9 +992,9 @@ static void gt64120_pci_set_irq(void *opaque, int irq= _num, int level) } =20 =20 -static void gt64120_reset(void *opaque) +static void gt64120_reset(DeviceState *dev) { - GT64120State *s =3D opaque; + GT64120State *s =3D GT64120_PCI_HOST_BRIDGE(dev); =20 /* FIXME: Malta specific hw assumptions ahead */ =20 @@ -1184,16 +1184,6 @@ PCIBus *gt64120_register(qemu_irq *pic) return phb->bus; } =20 -static int gt64120_init(SysBusDevice *dev) -{ - GT64120State *s; - - s =3D GT64120_PCI_HOST_BRIDGE(dev); - - qemu_register_reset(gt64120_reset, s); - return 0; -} - static void gt64120_pci_realize(PCIDevice *d, Error **errp) { /* FIXME: Malta specific hw assumptions ahead */ @@ -1241,9 +1231,8 @@ static const TypeInfo gt64120_pci_info =3D { static void gt64120_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); - SysBusDeviceClass *sdc =3D SYS_BUS_DEVICE_CLASS(klass); =20 - sdc->init =3D gt64120_init; + dc->reset =3D gt64120_reset; dc->vmsd =3D &vmstate_gt64120; } =20 --=20 2.18.0.rc1.1.g3f1ff2140