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Date: Fri, 26 Oct 2018 23:17:08 +0200
From: Fredrik Noring <noring@nocrew.org>
Message-ID: <20181026211708.GA22187@sx9>
References: <1540586148-11285-1-git-send-email-aleksandar.markovic@rt-rk.com>
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In-Reply-To: <1540586148-11285-1-git-send-email-aleksandar.markovic@rt-rk.com>
Subject: Re: [Qemu-devel] [PATCH 0/3] target/mips: Rename MMI-related code
 elements
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To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>, Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: qemu-devel@nongnu.org, aurelien@aurel32.net, smarkovic@wavecomp.com, pjovanovic@wavecomp.com, juergenurban@gmx.de, "Maciej W. Rozycki" <macro@linux-mips.org>

Hi Aleksandar,

> This series renames MMI-related code elements so that they do not
> contain TX79 substring. Tx79 is one of CPUs that support MMI ASE.
> Opcodes and other code elements should be as generic as possible,
> and should not contain CPU name if they are supported by multiple
> CPUs. In cases when there is a single-CPU-specific opcode, an
> anoter special convention should apply, like, for example,
> MMI_OPC__TX79_XXX or MMI_OPC__R5900_YYY. So far these cases were
> not identified, but there will be some in the future. But overall,
> the great MMI opcodes are shared (stay the same) between different
> CPUs that support MMI.
> 
> Aleksandar Markovic (3):
>   target/mips: Rename MMI-related masks
>   target/mips: Rename MMI-related opcodes
>   target/mips: Rename MMI-related functions
> 
>  target/mips/translate.c | 518 ++++++++++++++++++++++++------------------------
>  1 file changed, 259 insertions(+), 259 deletions(-)

This is interesting. Could you name a few other ISAs, beside the R5900
and the TX79, that have 128-bit GPRs and equivalent MMIs?

Fredrik