From: "Steffen Görtz" <contrib@steffen-goertz.de>
To: qemu-devel@nongnu.org
Cc: "Stefan Hajnoczi" <stefanha@gmail.com>,
	"Joel Stanley" <joel@jms.id.au>,
	"Jim Mussared" <jim@groklearning.com>,
	"Julia Suvorova" <jusual@mail.ru>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Steffen Görtz" <contrib@steffen-goertz.de>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Thomas Huth" <thuth@redhat.com>,
	"Laurent Vivier" <lvivier@redhat.com>
Subject: [Qemu-devel] [PATCH v3 01/13] qtest: Add set_irq_in command to set IRQ/GPIO level
Date: Tue, 30 Oct 2018 20:25:15 -0400	[thread overview]
Message-ID: <20181031002526.14262-2-contrib@steffen-goertz.de> (raw)
In-Reply-To: <20181031002526.14262-1-contrib@steffen-goertz.de>
Adds a new qtest command "set_irq_in" which allows
to set qemu gpio lines to a given level.
Based on https://lists.gnu.org/archive/html/qemu-devel/2012-12/msg02363.html
which never got merged.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Originally-by: Matthew Ogilvie <mmogilvi_qemu@miniinfo.net>
---
 qtest.c          | 40 ++++++++++++++++++++++++++++++++++++++++
 tests/libqtest.c | 10 ++++++++++
 tests/libqtest.h | 28 ++++++++++++++++++++++++++++
 3 files changed, 78 insertions(+)
diff --git a/qtest.c b/qtest.c
index 69b9e9962b..214f42a6c5 100644
--- a/qtest.c
+++ b/qtest.c
@@ -164,6 +164,14 @@ static bool qtest_opened;
  * where NUM is an IRQ number.  For the PC, interrupts can be intercepted
  * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
  * NUM=0 even though it is remapped to GSI 2).
+ *
+ * Setting interrupt level:
+ *
+ *  > set_irq_in QOM-PATH IRQ LEVEL
+ *  < OK
+ *
+ * Forcibly set the given interrupt pin to the given level.
+ *
  */
 
 static int hex2nib(char ch)
@@ -326,7 +334,39 @@ static void qtest_process_command(CharBackend *chr, gchar **words)
         irq_intercept_dev = dev;
         qtest_send_prefix(chr);
         qtest_send(chr, "OK\n");
+    } else if (strcmp(words[0], "set_irq_in") == 0) {
+        DeviceState *dev;
+        qemu_irq irq;
+        char *name;
+        int ret;
+        long num;
+        long level;
 
+        g_assert(words[1] && words[2] && words[3] && words[4]);
+
+        dev = DEVICE(object_resolve_path(words[1], NULL));
+        if (!dev) {
+            qtest_send_prefix(chr);
+            qtest_send(chr, "FAIL Unknown device\n");
+            return;
+        }
+
+        if (strcmp(words[2], "unnamed-gpio-in") == 0) {
+            name = NULL;
+        } else {
+            name = words[2];
+        }
+
+        ret = qemu_strtol(words[3], NULL, 10, &num);
+        g_assert(!ret);
+        ret = qemu_strtol(words[4], NULL, 10, &level);
+        g_assert(!ret);
+
+        irq = qdev_get_gpio_in_named(dev, name, num);
+
+        qemu_set_irq(irq, level);
+        qtest_send_prefix(chr);
+        qtest_send(chr, "OK\n");
     } else if (strcmp(words[0], "outb") == 0 ||
                strcmp(words[0], "outw") == 0 ||
                strcmp(words[0], "outl") == 0) {
diff --git a/tests/libqtest.c b/tests/libqtest.c
index 44ce118cfc..1cbde0d91a 100644
--- a/tests/libqtest.c
+++ b/tests/libqtest.c
@@ -732,6 +732,16 @@ void qtest_irq_intercept_in(QTestState *s, const char *qom_path)
     qtest_rsp(s, 0);
 }
 
+void qtest_set_irq_in(QTestState *s, const char *qom_path, const char *name,
+                      int num, int level)
+{
+    if (!name) {
+        name = "unnamed-gpio-in";
+    }
+    qtest_sendf(s, "set_irq_in %s %s %d %d\n", qom_path, name, num, level);
+    qtest_rsp(s, 0);
+}
+
 static void qtest_out(QTestState *s, const char *cmd, uint16_t addr, uint32_t value)
 {
     qtest_sendf(s, "%s 0x%x 0x%x\n", cmd, addr, value);
diff --git a/tests/libqtest.h b/tests/libqtest.h
index ed88ff99d5..65bffa9ace 100644
--- a/tests/libqtest.h
+++ b/tests/libqtest.h
@@ -232,6 +232,19 @@ void qtest_irq_intercept_in(QTestState *s, const char *string);
  */
 void qtest_irq_intercept_out(QTestState *s, const char *string);
 
+/**
+ * qtest_set_irq_in:
+ * @s: QTestState instance to operate on.
+ * @string: QOM path of a device
+ * @name: IRQ name
+ * @irq: IRQ number
+ * @level: IRQ level
+ *
+ * Force given device/irq GPIO-in pin to the given level.
+ */
+void qtest_set_irq_in(QTestState *s, const char *string, const char *name,
+                      int irq, int level);
+
 /**
  * qtest_outb:
  * @s: #QTestState instance to operate on.
@@ -678,6 +691,21 @@ static inline void irq_intercept_out(const char *string)
     qtest_irq_intercept_out(global_qtest, string);
 }
 
+/**
+ * qtest_set_irq_in:
+ * @string: QOM path of a device
+ * @name: IRQ name
+ * @irq: IRQ number
+ * @level: IRQ level
+ *
+ * Force given device/IRQ GPIO-in pin to the given level.
+ */
+static inline void set_irq_in(const char *string, const char *name,
+                              int irq, int level)
+{
+    qtest_set_irq_in(global_qtest, string, name, irq, level);
+}
+
 /**
  * outb:
  * @addr: I/O port to write to.
-- 
2.19.1
next prev parent reply	other threads:[~2018-10-31  0:25 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-31  0:25 [Qemu-devel] [PATCH v3 00/13] arm: nRF51 Devices and Microbit Support Steffen Görtz
2018-10-31  0:25 ` Steffen Görtz [this message]
2018-10-31 11:14   ` [Qemu-devel] [PATCH v3 01/13] qtest: Add set_irq_in command to set IRQ/GPIO level Laurent Vivier
2018-10-31 13:16     ` Steffen Görtz
2018-11-01 10:41   ` Stefan Hajnoczi
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 02/13] arm: Add header to host common definition for nRF51 SOC peripherals Steffen Görtz
2018-11-01 10:56   ` Stefan Hajnoczi
2018-11-01 11:16   ` Julia Suvorova
2018-11-02 15:39     ` Steffen Görtz
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 03/13] hw/misc/nrf51_rng: Add NRF51 random number generator peripheral Steffen Görtz
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 04/13] arm: Instantiate NRF51 random number generator Steffen Görtz
2018-11-01 11:02   ` Stefan Hajnoczi
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 05/13] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories Steffen Görtz
2018-11-01 11:17   ` Stefan Hajnoczi
2018-11-02 15:58     ` Steffen Görtz
2018-11-01 12:25   ` Stefan Hajnoczi
2018-11-02 15:59     ` Steffen Görtz
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 06/13] arm: Instantiate NRF51 special NVM's and NVMC Steffen Görtz
2018-11-01 12:25   ` Stefan Hajnoczi
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 07/13] tests: Add bbc:microbit / nRF51 test suite Steffen Görtz
2018-11-01 12:27   ` Stefan Hajnoczi
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 08/13] hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral Steffen Görtz
2018-11-01 12:32   ` Stefan Hajnoczi
2018-11-02 16:29     ` Steffen Görtz
2018-11-02 15:02   ` Peter Maydell
2018-11-02 16:30     ` Steffen Görtz
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 09/13] arm: Instantiate NRF51 general purpose I/O Steffen Görtz
2018-11-01 12:41   ` Stefan Hajnoczi
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 10/13] tests/microbit-test: Add Tests for nRF51 GPIO Steffen Görtz
2018-11-01 12:41   ` Stefan Hajnoczi
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 11/13] hw/timer/nrf51_timer: Add nRF51 Timer peripheral Steffen Görtz
     [not found]   ` <20181101124848.GT24946@stefanha-x1.localdomain>
2018-11-02 16:54     ` Steffen Görtz
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 12/13] arm: Instantiate NRF51 Timers Steffen Görtz
2018-11-01 13:01   ` Stefan Hajnoczi
2018-11-02 15:57   ` Steffen Görtz
2018-10-31  0:25 ` [Qemu-devel] [PATCH v3 13/13] arm: Add Clock peripheral stub to NRF51 SOC Steffen Görtz
2018-11-01 13:08   ` Stefan Hajnoczi
2018-11-01  4:42 ` [Qemu-devel] [PATCH v3 00/13] arm: nRF51 Devices and Microbit Support no-reply
2018-11-01  4:46 ` no-reply
2018-11-03  3:24 ` no-reply
2018-11-03  3:28 ` no-reply
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