From: "Steffen Görtz" <contrib@steffen-goertz.de>
To: qemu-devel@nongnu.org
Cc: "Stefan Hajnoczi" <stefanha@gmail.com>,
"Joel Stanley" <joel@jms.id.au>,
"Jim Mussared" <jim@groklearning.com>,
"Julia Suvorova" <jusual@mail.ru>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steffen Görtz" <contrib@steffen-goertz.de>,
"open list:NRF51" <qemu-arm@nongnu.org>
Subject: [Qemu-devel] [PATCH v3 02/13] arm: Add header to host common definition for nRF51 SOC peripherals
Date: Tue, 30 Oct 2018 20:25:16 -0400 [thread overview]
Message-ID: <20181031002526.14262-3-contrib@steffen-goertz.de> (raw)
In-Reply-To: <20181031002526.14262-1-contrib@steffen-goertz.de>
Adds a header that provides definitions that are used
across nRF51 peripherals
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
---
hw/arm/nrf51_soc.c | 33 ++++++++++-----------------
include/hw/arm/nrf51.h | 44 ++++++++++++++++++++++++++++++++++++
include/hw/char/nrf51_uart.h | 1 -
3 files changed, 56 insertions(+), 22 deletions(-)
create mode 100644 include/hw/arm/nrf51.h
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index b89c1bdea0..55f8eaafcb 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -21,27 +21,16 @@
#include "qemu/log.h"
#include "cpu.h"
+#include "hw/arm/nrf51.h"
#include "hw/arm/nrf51_soc.h"
-#define IOMEM_BASE 0x40000000
-#define IOMEM_SIZE 0x20000000
-
-#define FICR_BASE 0x10000000
-#define FICR_SIZE 0x000000fc
-
-#define FLASH_BASE 0x00000000
-#define SRAM_BASE 0x20000000
-
-#define PRIVATE_BASE 0xF0000000
-#define PRIVATE_SIZE 0x10000000
-
/*
* The size and base is for the NRF51822 part. If other parts
* are supported in the future, add a sub-class of NRF51SoC for
* the specific variants
*/
-#define NRF51822_FLASH_SIZE (256 * 1024)
-#define NRF51822_SRAM_SIZE (16 * 1024)
+#define NRF51822_FLASH_SIZE (256 * NRF51_PAGE_SIZE)
+#define NRF51822_SRAM_SIZE (16 * NRF51_PAGE_SIZE)
#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
@@ -76,14 +65,14 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
error_propagate(errp, err);
return;
}
- memory_region_add_subregion(&s->container, FLASH_BASE, &s->flash);
+ memory_region_add_subregion(&s->container, NRF51_FLASH_BASE, &s->flash);
memory_region_init_ram(&s->sram, NULL, "nrf51.sram", s->sram_size, &err);
if (err) {
error_propagate(errp, err);
return;
}
- memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram);
+ memory_region_add_subregion(&s->container, NRF51_SRAM_BASE, &s->sram);
/* UART */
object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
@@ -92,15 +81,17 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
return;
}
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0);
- memory_region_add_subregion_overlap(&s->container, UART_BASE, mr, 0);
+ memory_region_add_subregion_overlap(&s->container, NRF51_UART_BASE, mr, 0);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0,
qdev_get_gpio_in(DEVICE(&s->cpu),
- BASE_TO_IRQ(UART_BASE)));
+ BASE_TO_IRQ(NRF51_UART_BASE)));
- create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE);
- create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE);
+ create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE,
+ NRF51_IOMEM_SIZE);
+ create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE,
+ NRF51_FICR_SIZE);
create_unimplemented_device("nrf51_soc.private",
- PRIVATE_BASE, PRIVATE_SIZE);
+ NRF51_PRIVATE_BASE, NRF51_PRIVATE_SIZE);
}
static void nrf51_soc_init(Object *obj)
diff --git a/include/hw/arm/nrf51.h b/include/hw/arm/nrf51.h
new file mode 100644
index 0000000000..a89b6c23f0
--- /dev/null
+++ b/include/hw/arm/nrf51.h
@@ -0,0 +1,44 @@
+/*
+ * Nordic Semiconductor nRF51 Series SOC Common Defines
+ *
+ * This file hosts generic defines used in various nRF51 peripheral devices.
+ *
+ * Reference Manual: http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf
+ * Product Spec: http://infocenter.nordicsemi.com/pdf/nRF51822_PS_v3.1.pdf
+ *
+ * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
+ *
+ * This code is licensed under the GPL version 2 or later. See
+ * the COPYING file in the top-level directory.
+ */
+
+#ifndef NRF51_H
+#define NRF51_H
+
+#define NRF51_FLASH_BASE 0x00000000
+#define NRF51_FICR_BASE 0x10000000
+#define NRF51_FICR_SIZE 0x00000100
+#define NRF51_UICR_BASE 0x10001000
+#define NRF51_SRAM_BASE 0x20000000
+
+#define NRF51_IOMEM_BASE 0x40000000
+#define NRF51_IOMEM_SIZE 0x20000000
+
+#define NRF51_UART_BASE 0x40002000
+#define NRF51_TIMER_BASE 0x40008000
+#define NRF51_RNG_BASE 0x4000D000
+#define NRF51_NVMC_BASE 0x4001E000
+#define NRF51_GPIO_BASE 0x50000000
+
+#define NRF51_PRIVATE_BASE 0xF0000000
+#define NRF51_PRIVATE_SIZE 0x10000000
+
+#define NRF51_PAGE_SIZE 1024
+
+/* Trigger */
+#define NRF51_TRIGGER_TASK 0x01
+
+/* Events */
+#define NRF51_EVENT_CLEAR 0x00
+
+#endif
diff --git a/include/hw/char/nrf51_uart.h b/include/hw/char/nrf51_uart.h
index e3ecb7c81c..eb1c15b490 100644
--- a/include/hw/char/nrf51_uart.h
+++ b/include/hw/char/nrf51_uart.h
@@ -16,7 +16,6 @@
#include "hw/registerfields.h"
#define UART_FIFO_LENGTH 6
-#define UART_BASE 0x40002000
#define UART_SIZE 0x1000
#define TYPE_NRF51_UART "nrf51_soc.uart"
--
2.19.1
next prev parent reply other threads:[~2018-10-31 0:26 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-31 0:25 [Qemu-devel] [PATCH v3 00/13] arm: nRF51 Devices and Microbit Support Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 01/13] qtest: Add set_irq_in command to set IRQ/GPIO level Steffen Görtz
2018-10-31 11:14 ` Laurent Vivier
2018-10-31 13:16 ` Steffen Görtz
2018-11-01 10:41 ` Stefan Hajnoczi
2018-10-31 0:25 ` Steffen Görtz [this message]
2018-11-01 10:56 ` [Qemu-devel] [PATCH v3 02/13] arm: Add header to host common definition for nRF51 SOC peripherals Stefan Hajnoczi
2018-11-01 11:16 ` Julia Suvorova
2018-11-02 15:39 ` Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 03/13] hw/misc/nrf51_rng: Add NRF51 random number generator peripheral Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 04/13] arm: Instantiate NRF51 random number generator Steffen Görtz
2018-11-01 11:02 ` Stefan Hajnoczi
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 05/13] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories Steffen Görtz
2018-11-01 11:17 ` Stefan Hajnoczi
2018-11-02 15:58 ` Steffen Görtz
2018-11-01 12:25 ` Stefan Hajnoczi
2018-11-02 15:59 ` Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 06/13] arm: Instantiate NRF51 special NVM's and NVMC Steffen Görtz
2018-11-01 12:25 ` Stefan Hajnoczi
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 07/13] tests: Add bbc:microbit / nRF51 test suite Steffen Görtz
2018-11-01 12:27 ` Stefan Hajnoczi
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 08/13] hw/gpio/nrf51_gpio: Add nRF51 GPIO peripheral Steffen Görtz
2018-11-01 12:32 ` Stefan Hajnoczi
2018-11-02 16:29 ` Steffen Görtz
2018-11-02 15:02 ` Peter Maydell
2018-11-02 16:30 ` Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 09/13] arm: Instantiate NRF51 general purpose I/O Steffen Görtz
2018-11-01 12:41 ` Stefan Hajnoczi
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 10/13] tests/microbit-test: Add Tests for nRF51 GPIO Steffen Görtz
2018-11-01 12:41 ` Stefan Hajnoczi
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 11/13] hw/timer/nrf51_timer: Add nRF51 Timer peripheral Steffen Görtz
[not found] ` <20181101124848.GT24946@stefanha-x1.localdomain>
2018-11-02 16:54 ` Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 12/13] arm: Instantiate NRF51 Timers Steffen Görtz
2018-11-01 13:01 ` Stefan Hajnoczi
2018-11-02 15:57 ` Steffen Görtz
2018-10-31 0:25 ` [Qemu-devel] [PATCH v3 13/13] arm: Add Clock peripheral stub to NRF51 SOC Steffen Görtz
2018-11-01 13:08 ` Stefan Hajnoczi
2018-11-01 4:42 ` [Qemu-devel] [PATCH v3 00/13] arm: nRF51 Devices and Microbit Support no-reply
2018-11-01 4:46 ` no-reply
2018-11-03 3:24 ` no-reply
2018-11-03 3:28 ` no-reply
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