* [Qemu-devel] [PATCH] softfloat: Don't execute divdeu without power7
@ 2018-11-01 20:26 Richard Henderson
2018-11-01 22:49 ` Laurent Vivier
0 siblings, 1 reply; 2+ messages in thread
From: Richard Henderson @ 2018-11-01 20:26 UTC (permalink / raw)
To: qemu-devel; +Cc: laurent
The divdeu instruction was added to ISA 2.06 (Power7).
Exclude this block from older cpus.
Fixes: 27ae5109a2ba (softfloat: Specialize udiv_qrnnd for ppc64)
Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/fpu/softfloat-macros.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
index c86687fa5e..b1d772e6d4 100644
--- a/include/fpu/softfloat-macros.h
+++ b/include/fpu/softfloat-macros.h
@@ -647,8 +647,8 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,
asm("dlgr %0, %1" : "+r"(n) : "r"(d));
*r = n >> 64;
return n;
-#elif defined(_ARCH_PPC64)
- /* From Power ISA 3.0B, programming note for divdeu. */
+#elif defined(_ARCH_PPC64) && defined(_ARCH_PWR7)
+ /* From Power ISA 2.06, programming note for divdeu. */
uint64_t q1, q2, Q, r1, r2, R;
asm("divdeu %0,%2,%4; divdu %1,%3,%4"
: "=&r"(q1), "=r"(q2)
--
2.17.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] softfloat: Don't execute divdeu without power7
2018-11-01 20:26 [Qemu-devel] [PATCH] softfloat: Don't execute divdeu without power7 Richard Henderson
@ 2018-11-01 22:49 ` Laurent Vivier
0 siblings, 0 replies; 2+ messages in thread
From: Laurent Vivier @ 2018-11-01 22:49 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 01/11/2018 21:26, Richard Henderson wrote:
> The divdeu instruction was added to ISA 2.06 (Power7).
> Exclude this block from older cpus.
>
> Fixes: 27ae5109a2ba (softfloat: Specialize udiv_qrnnd for ppc64)
> Reported-by: Laurent Vivier <laurent@vivier.eu>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/fpu/softfloat-macros.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h
> index c86687fa5e..b1d772e6d4 100644
> --- a/include/fpu/softfloat-macros.h
> +++ b/include/fpu/softfloat-macros.h
> @@ -647,8 +647,8 @@ static inline uint64_t udiv_qrnnd(uint64_t *r, uint64_t n1,
> asm("dlgr %0, %1" : "+r"(n) : "r"(d));
> *r = n >> 64;
> return n;
> -#elif defined(_ARCH_PPC64)
> - /* From Power ISA 3.0B, programming note for divdeu. */
> +#elif defined(_ARCH_PPC64) && defined(_ARCH_PWR7)
> + /* From Power ISA 2.06, programming note for divdeu. */
> uint64_t q1, q2, Q, r1, r2, R;
> asm("divdeu %0,%2,%4; divdu %1,%3,%4"
> : "=&r"(q1), "=r"(q2)
>
Tested-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2018-11-01 22:54 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-11-01 20:26 [Qemu-devel] [PATCH] softfloat: Don't execute divdeu without power7 Richard Henderson
2018-11-01 22:49 ` Laurent Vivier
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).