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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat
Date: Fri,  2 Nov 2018 17:16:29 +0000	[thread overview]
Message-ID: <20181102171638.24069-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20181102171638.24069-1-peter.maydell@linaro.org>

From: Eric Auger <eric.auger@redhat.com>

We are missing the VIRT_COMPAT_3_0 definition and setting.
Let's add them.

Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reviewed-by: Andrew Jones <drjones@redhat.com>
Message-id: 20181024085602.16611-1-eric.auger@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/arm/virt.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f677825f9f..a2b8d8f7c2c 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1871,6 +1871,9 @@ static void virt_machine_3_1_options(MachineClass *mc)
 }
 DEFINE_VIRT_MACHINE_AS_LATEST(3, 1)
 
+#define VIRT_COMPAT_3_0 \
+    HW_COMPAT_3_0
+
 static void virt_3_0_instance_init(Object *obj)
 {
     virt_3_1_instance_init(obj);
@@ -1879,6 +1882,7 @@ static void virt_3_0_instance_init(Object *obj)
 static void virt_machine_3_0_options(MachineClass *mc)
 {
     virt_machine_3_1_options(mc);
+    SET_MACHINE_COMPAT(mc, VIRT_COMPAT_3_0);
 }
 DEFINE_VIRT_MACHINE(3, 0)
 
-- 
2.19.1

  reply	other threads:[~2018-11-02 17:19 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-02 17:16 [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
2018-11-02 17:16 ` Peter Maydell [this message]
2018-11-02 17:16 ` [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support Peter Maydell
2019-05-24 12:33   ` Laszlo Ersek
2019-05-24 12:45     ` Laszlo Ersek
2019-05-24 13:11     ` Philippe Mathieu-Daudé
2019-07-16 12:03     ` Peter Maydell
2019-07-16 14:02       ` Richard Henderson
2019-07-16 14:18         ` Peter Maydell
2019-07-16 15:04           ` Richard Henderson
2019-07-16 16:50       ` Laszlo Ersek
2019-07-16 16:59         ` Peter Maydell
2019-07-16 18:42           ` Laszlo Ersek
2019-07-16 20:10             ` Philippe Mathieu-Daudé
2019-07-17  8:36               ` Laszlo Ersek
2019-07-17  9:22                 ` Laszlo Ersek
2019-07-17  9:24                   ` Laszlo Ersek
2019-07-17 12:49                   ` Laszlo Ersek
2019-07-17 12:53                   ` Laszlo Ersek
2019-07-17 13:36                   ` Philippe Mathieu-Daudé
2019-07-17 13:46                     ` Peter Maydell
2019-07-17 15:08                       ` Laszlo Ersek
2019-07-18 12:30                         ` Peter Maydell
2019-07-18 19:07                           ` Laszlo Ersek
2019-07-17 13:45                   ` Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board Peter Maydell
2018-12-04 10:28   ` Peter Maydell
2018-12-12 22:05     ` Edgar E. Iglesias
2022-01-27 13:10   ` Peter Maydell
2022-01-30 10:33     ` Edgar E. Iglesias
2018-11-02 18:22 ` [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell

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