From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC
Date: Fri, 2 Nov 2018 17:16:31 +0000 [thread overview]
Message-ID: <20181102171638.24069-4-peter.maydell@linaro.org> (raw)
In-Reply-To: <20181102171638.24069-1-peter.maydell@linaro.org>
From: Julia Suvorova <jusual@mail.ru>
Wire up nRF51 UART in the corresponding SoC.
Signed-off-by: Julia Suvorova <jusual@mail.ru>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/nrf51_soc.h | 3 +++
hw/arm/microbit.c | 2 ++
hw/arm/nrf51_soc.c | 20 ++++++++++++++++++++
3 files changed, 25 insertions(+)
diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h
index f4e092b554e..73fc92e9a8d 100644
--- a/include/hw/arm/nrf51_soc.h
+++ b/include/hw/arm/nrf51_soc.h
@@ -12,6 +12,7 @@
#include "hw/sysbus.h"
#include "hw/arm/armv7m.h"
+#include "hw/char/nrf51_uart.h"
#define TYPE_NRF51_SOC "nrf51-soc"
#define NRF51_SOC(obj) \
@@ -24,6 +25,8 @@ typedef struct NRF51State {
/*< public >*/
ARMv7MState cpu;
+ NRF51UARTState uart;
+
MemoryRegion iomem;
MemoryRegion sram;
MemoryRegion flash;
diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c
index e7d74116a50..a734e7f650e 100644
--- a/hw/arm/microbit.c
+++ b/hw/arm/microbit.c
@@ -12,6 +12,7 @@
#include "qapi/error.h"
#include "hw/boards.h"
#include "hw/arm/arm.h"
+#include "sysemu/sysemu.h"
#include "exec/address-spaces.h"
#include "hw/arm/nrf51_soc.h"
@@ -35,6 +36,7 @@ static void microbit_init(MachineState *machine)
sysbus_init_child_obj(OBJECT(machine), "nrf51", soc, sizeof(s->nrf51),
TYPE_NRF51_SOC);
+ qdev_prop_set_chr(DEVICE(&s->nrf51), "serial0", serial_hd(0));
object_property_set_link(soc, OBJECT(system_memory), "memory",
&error_fatal);
object_property_set_bool(soc, true, "realized", &error_fatal);
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 1a59ef45525..b89c1bdea08 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -43,9 +43,12 @@
#define NRF51822_FLASH_SIZE (256 * 1024)
#define NRF51822_SRAM_SIZE (16 * 1024)
+#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
+
static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
{
NRF51State *s = NRF51_SOC(dev_soc);
+ MemoryRegion *mr;
Error *err = NULL;
if (!s->board_memory) {
@@ -82,6 +85,18 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
}
memory_region_add_subregion(&s->container, SRAM_BASE, &s->sram);
+ /* UART */
+ object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart), 0);
+ memory_region_add_subregion_overlap(&s->container, UART_BASE, mr, 0);
+ sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart), 0,
+ qdev_get_gpio_in(DEVICE(&s->cpu),
+ BASE_TO_IRQ(UART_BASE)));
+
create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE);
create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE);
create_unimplemented_device("nrf51_soc.private",
@@ -99,6 +114,11 @@ static void nrf51_soc_init(Object *obj)
qdev_prop_set_string(DEVICE(&s->cpu), "cpu-type",
ARM_CPU_TYPE_NAME("cortex-m0"));
qdev_prop_set_uint32(DEVICE(&s->cpu), "num-irq", 32);
+
+ sysbus_init_child_obj(obj, "uart", &s->uart, sizeof(s->uart),
+ TYPE_NRF51_UART);
+ object_property_add_alias(obj, "serial0", OBJECT(&s->uart), "chardev",
+ &error_abort);
}
static Property nrf51_soc_properties[] = {
--
2.19.1
next prev parent reply other threads:[~2018-11-02 17:19 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-02 17:16 [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART Peter Maydell
2018-11-02 17:16 ` Peter Maydell [this message]
2018-11-02 17:16 ` [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support Peter Maydell
2019-05-24 12:33 ` Laszlo Ersek
2019-05-24 12:45 ` Laszlo Ersek
2019-05-24 13:11 ` Philippe Mathieu-Daudé
2019-07-16 12:03 ` Peter Maydell
2019-07-16 14:02 ` Richard Henderson
2019-07-16 14:18 ` Peter Maydell
2019-07-16 15:04 ` Richard Henderson
2019-07-16 16:50 ` Laszlo Ersek
2019-07-16 16:59 ` Peter Maydell
2019-07-16 18:42 ` Laszlo Ersek
2019-07-16 20:10 ` Philippe Mathieu-Daudé
2019-07-17 8:36 ` Laszlo Ersek
2019-07-17 9:22 ` Laszlo Ersek
2019-07-17 9:24 ` Laszlo Ersek
2019-07-17 12:49 ` Laszlo Ersek
2019-07-17 12:53 ` Laszlo Ersek
2019-07-17 13:36 ` Philippe Mathieu-Daudé
2019-07-17 13:46 ` Peter Maydell
2019-07-17 15:08 ` Laszlo Ersek
2019-07-18 12:30 ` Peter Maydell
2019-07-18 19:07 ` Laszlo Ersek
2019-07-17 13:45 ` Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board Peter Maydell
2018-12-04 10:28 ` Peter Maydell
2018-12-12 22:05 ` Edgar E. Iglesias
2022-01-27 13:10 ` Peter Maydell
2022-01-30 10:33 ` Edgar E. Iglesias
2018-11-02 18:22 ` [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
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