From: Fredrik Noring <noring@nocrew.org>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Aleksandar Markovic" <amarkovic@wavecomp.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Jürgen Urban" <JuergenUrban@gmx.de>,
"Jia Liu" <proljc@gmail.com>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1
Date: Mon, 5 Nov 2018 16:40:46 +0100 [thread overview]
Message-ID: <20181105154046.GA2383@sx9> (raw)
In-Reply-To: <alpine.LFD.2.21.1811041503590.20378@eddie.linux-mips.org>
Thanks for checking this, Maciej,
[ Cc-ing Jia Liu, who added MIPS ASE DSP support in commit 4133498f8e532f
"Use correct acc value to index cpu_HI/cpu_LO rather than using a fix
number", in case there are known ISA deviations. ]
> However `gen_HILO' looks wrong to me as it'll truncate the values of
> $acc3-$acc1 with the 64-bit DSP ASE.
I can post a patch to fix gen_HILO. The best reference I have found so far
is "MIPS Architecture for Programmers Volume IV-e: MIPS DSP Module for
microMIPS64 Architecture"
https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00765-2B-microMIPS64DSP-AFP-03.02.pdf
that says
MFHI: GPR[rds]63..0 <- HI[ac]63..0
MFLO: GPR[rdt]63..0 <- LO[ac]63..0
MTHI: HI[ac]63..0 <- GPR[rs]63..0
MTLO: LO[ac]63..0 <- GPR[rs]63..0
where ac can range from 0 to 3. Do you have a link to a better reference,
by chance, that isn't tied to microMIPS?
Fredrik
next prev parent reply other threads:[~2018-11-05 15:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-02 16:07 [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900 M{F, T}{HI, LO}1 and DIV[U]1 Fredrik Noring
2018-11-02 16:08 ` [Qemu-devel] [PATCH 1/2] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1 Fredrik Noring
2018-11-02 18:10 ` Philippe Mathieu-Daudé
2018-11-04 10:15 ` Richard Henderson
2018-11-04 13:12 ` Fredrik Noring
2018-11-04 15:09 ` Maciej W. Rozycki
2018-11-05 15:40 ` Fredrik Noring [this message]
2018-11-05 16:06 ` Maciej W. Rozycki
2018-11-02 16:08 ` [Qemu-devel] [PATCH 2/2] target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1 Fredrik Noring
2018-11-02 18:15 ` Philippe Mathieu-Daudé
2018-11-05 13:18 ` [Qemu-devel] [PATCH 0/2] target/mips: Fix decoding mechanisms of R5900 M{F, T}{HI, LO}1 and DIV[U]1 Aleksandar Markovic
2018-11-05 18:12 ` Fredrik Noring
2018-11-05 18:58 ` Aleksandar Markovic
2018-11-07 19:17 ` Fredrik Noring
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