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From: Fredrik Noring <noring@nocrew.org>
To: Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Jürgen Urban" <JuergenUrban@gmx.de>,
	"Maciej W. Rozycki" <macro@linux-mips.org>,
	qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 4/6] target/mips: Fix decoding mechanism of special R5900 opcodes
Date: Thu, 8 Nov 2018 19:50:58 +0100	[thread overview]
Message-ID: <20181108185058.GA21067@sx9> (raw)
In-Reply-To: <BN6PR2201MB12512C561DAD7AE29946682CC6C50@BN6PR2201MB1251.namprd22.prod.outlook.com>

Hi Aleksandar,

> Fredrik, do you know by any chance if a document exists that would justify
> inclusion of non-R5900 DMULT, DMULTU, DDIV, DDIVU in R5900 executables by
> gcc for R5900? Is it included by cross-gcc or by native gcc, or by both?
> 
> I think gcc folks must have had a good reason for that, some kind of
> design - it can't be 'I really like/miss this instruction, let's include
> it...'

The R5900 reports itself as MIPS III and DMULT, DMULTU, DDIV and DDIVU
are part of the MIPS III ISA. They are emulated in user mode to support
generic MIPS III programs.

I have now obtained an R5900 n32 ABI toolchain. R5900 n32 ABI emulation
support is recognised with

http://lists.nongnu.org/archive/html/qemu-devel/2018-11/msg01609.html

and a test of DMULT emulation is available with

http://lists.nongnu.org/archive/html/qemu-devel/2018-11/msg01610.html

Fredrik

  reply	other threads:[~2018-11-08 18:51 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-07 19:17 [Qemu-devel] [PATCH v2 0/6] Fix decoding mechanisms of the R5900 Fredrik Noring
2018-11-07 19:18 ` [Qemu-devel] [PATCH v2 1/6] target/mips: Fix decoding mechanism of R5900 MFLO1, MFHI1, MTLO1 and MTHI1 Fredrik Noring
2018-11-17 15:28   ` Aleksandar Markovic
2018-11-07 19:18 ` [Qemu-devel] [PATCH v2 2/6] target/mips: Fix decoding mechanism of R5900 DIV1 and DIVU1 Fredrik Noring
2018-11-07 19:18 ` [Qemu-devel] [PATCH v2 3/6] target/mips: Fix HI[ac] and LO[ac] 32-bit truncation with MIPS64 DSP ASE Fredrik Noring
2018-11-08 10:17   ` Aleksandar Markovic
2018-11-07 19:19 ` [Qemu-devel] [PATCH v2 4/6] target/mips: Fix decoding mechanism of special R5900 opcodes Fredrik Noring
2018-11-08 10:27   ` Aleksandar Markovic
2018-11-08 18:50     ` Fredrik Noring [this message]
2018-11-08 22:00       ` Maciej W. Rozycki
2018-11-09  9:50     ` Aleksandar Markovic
2018-11-09 13:24       ` Fredrik Noring
2018-11-09 14:23         ` Aleksandar Markovic
2018-11-09 14:35           ` Fredrik Noring
2018-11-09 14:37             ` Aleksandar Markovic
2018-11-09 15:23               ` Aleksandar Markovic
2018-11-09 16:49                 ` Maciej W. Rozycki
2018-11-09 13:53       ` Maciej W. Rozycki
2018-11-17 15:25   ` Aleksandar Markovic
2018-11-07 19:19 ` [Qemu-devel] [PATCH v2 5/6] target/mips: Guard check_insn_opc_user_only with INSN_R5900 check Fredrik Noring
2018-11-17 15:27   ` Aleksandar Markovic
2018-11-07 19:19 ` [Qemu-devel] [PATCH v2 6/6] target/mips: Guard check_insn " Fredrik Noring
2018-11-17 15:26   ` Aleksandar Markovic

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