From: Peter Xu <peterx@redhat.com>
To: Yu Zhang <yu.c.zhang@linux.intel.com>
Cc: qemu-devel@nongnu.org, "Michael S. Tsirkin" <mst@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Richard Henderson <rth@twiddle.net>,
Eduardo Habkost <ehabkost@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v1 0/3] intel-iommu: add support for 5-level virtual IOMMU.
Date: Mon, 12 Nov 2018 16:53:31 +0800 [thread overview]
Message-ID: <20181112085331.GE20675@xz-x1> (raw)
In-Reply-To: <1541764187-10732-1-git-send-email-yu.c.zhang@linux.intel.com>
On Fri, Nov 09, 2018 at 07:49:44PM +0800, Yu Zhang wrote:
> Intel's upcoming processors will extend maximum linear address width to
> 57 bits, and introduce 5-level paging for CPU. Meanwhile, the platform
> will also extend the maximum guest address width for IOMMU to 57 bits,
> thus introducing the 5-level paging for 2nd level translation(See chapter 3
> in Intel Virtualization Technology for Directed I/O).
>
> This patch set extends the current logic to support a wider address width.
> A 5-level paging capable IOMMU(for 2nd level translation) can be rendered
> with configuration "device intel-iommu,x-aw-bits=57".
Along with this series, I'm not sure whether it'll be good we start to
consider removing the "x-" prefix for "x-aw-bits".
Michael?
Regards,
--
Peter Xu
prev parent reply other threads:[~2018-11-12 8:54 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-09 11:49 [Qemu-devel] [PATCH v1 0/3] intel-iommu: add support for 5-level virtual IOMMU Yu Zhang
2018-11-09 11:49 ` [Qemu-devel] [PATCH v1 1/3] intel-iommu: differentiate host address width from IOVA address width Yu Zhang
2018-11-12 8:15 ` Peter Xu
2018-11-12 9:28 ` Yu Zhang
2018-11-09 11:49 ` [Qemu-devel] [PATCH v1 2/3] intel-iommu: extend VTD emulation to allow 57-bit " Yu Zhang
2018-11-12 8:36 ` Peter Xu
2018-11-12 9:42 ` Yu Zhang
2018-11-13 3:37 ` Peter Xu
2018-11-13 5:04 ` Peter Xu
2018-11-13 5:45 ` Yu Zhang
2018-11-13 6:12 ` Peter Xu
2018-11-13 6:59 ` Yu Zhang
2018-11-13 5:41 ` Yu Zhang
2018-11-09 11:49 ` [Qemu-devel] [PATCH v1 3/3] intel-iommu: search iotlb for levels supported by the " Yu Zhang
2018-11-12 8:51 ` Peter Xu
2018-11-12 9:25 ` Yu Zhang
2018-11-12 9:36 ` Peter Xu
2018-11-12 12:38 ` Yu Zhang
2018-11-13 5:18 ` Peter Xu
2018-11-13 5:53 ` Yu Zhang
2018-11-09 22:32 ` [Qemu-devel] [PATCH v1 0/3] intel-iommu: add support for 5-level virtual IOMMU no-reply
2018-11-12 8:53 ` Peter Xu [this message]
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