From: Guenter Roeck <linux@roeck-us.net>
To: Logan Gunthorpe <logang@deltatee.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>,
"alistair23@gmail.com" <alistair23@gmail.com>,
"abologna@redhat.com" <abologna@redhat.com>
Subject: Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe
Date: Wed, 21 Nov 2018 10:36:13 -0800 [thread overview]
Message-ID: <20181121183613.GA4874@roeck-us.net> (raw)
In-Reply-To: <e7398997-ba1a-9182-6be0-da8e43e920df@deltatee.com>
Hi Logan,
On Wed, Nov 21, 2018 at 11:05:21AM -0700, Logan Gunthorpe wrote:
>
>
> On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> > Connect the Xilinx PCIe device based on the information in the device
> > tree stored in the ROM of the HiFish Unleashed board.
>
> I only briefly tested this patch but could not get any PCI devices to
> come up with the sifive_u machine. Depending on the kernel I tried, it
> either failed to initialize a Xilinx PCIe (likely due to a mismatch with
> the DT) or it appears to successfully initialize a Microsemi device but
> did not enumerate any devices underneath.
What kernel configuration, devicetree, and qemu command line do you use
for the sifive_u machine ?
Thanks,
Guenter
>
> In any case, it would be nice if the Microsemi/Xilinx confusion was at
> least explained in the commit message.
>
> Thanks,
>
> Logan
next prev parent reply other threads:[~2018-11-21 18:36 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-21 17:02 [Qemu-devel] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V Alistair Francis
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts Alistair Francis
2018-11-21 17:58 ` Logan Gunthorpe
2018-11-21 18:17 ` Alistair Francis
2018-11-21 18:45 ` Logan Gunthorpe
2018-11-21 18:49 ` Alistair Francis
2018-11-21 18:56 ` Logan Gunthorpe
2018-11-21 18:59 ` Alistair Francis
2018-11-21 19:02 ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 2/6] hw/riscv/virt: Adjust memory layout spacing Alistair Francis
2018-11-21 17:59 ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 3/6] hw/riscv/virt: Connect the gpex PCIe Alistair Francis
2018-11-21 18:01 ` Logan Gunthorpe
2018-11-21 18:21 ` Alistair Francis
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA Alistair Francis
2018-11-21 18:01 ` Logan Gunthorpe
2018-11-21 17:02 ` [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe Alistair Francis
2018-11-21 18:05 ` Logan Gunthorpe
2018-11-21 18:32 ` Alistair Francis
2018-11-21 18:50 ` Logan Gunthorpe
2018-11-21 19:02 ` Alistair Francis
2018-11-21 19:08 ` Logan Gunthorpe
2018-11-21 19:16 ` Alistair Francis
2018-11-21 19:19 ` Logan Gunthorpe
2018-11-21 19:21 ` Alistair Francis
2018-11-21 19:24 ` Logan Gunthorpe
2018-11-21 19:51 ` Alistair Francis
2018-11-21 21:54 ` Alistair Francis
2018-11-21 22:01 ` Logan Gunthorpe
2018-11-21 22:09 ` Alistair Francis
2018-11-21 22:11 ` Logan Gunthorpe
2018-11-21 22:15 ` Palmer Dabbelt
2018-11-21 21:37 ` Palmer Dabbelt
2018-11-21 22:01 ` Alistair Francis
2018-11-21 22:15 ` Palmer Dabbelt
2018-11-21 19:15 ` Logan Gunthorpe
2018-11-21 19:18 ` Alistair Francis
2018-11-21 19:20 ` Logan Gunthorpe
2018-11-21 21:26 ` Palmer Dabbelt
2018-11-21 21:49 ` Alistair Francis
2018-11-21 22:15 ` Palmer Dabbelt
2018-11-21 22:23 ` Alistair Francis
2018-11-21 22:36 ` Palmer Dabbelt
2018-11-21 23:10 ` Guenter Roeck
2018-11-21 23:26 ` Logan Gunthorpe
2018-11-22 2:13 ` Palmer Dabbelt
2018-11-22 2:23 ` Alistair Francis
2018-11-26 19:15 ` Palmer Dabbelt
2018-11-21 18:36 ` Guenter Roeck [this message]
2018-11-21 18:55 ` Logan Gunthorpe
2018-11-21 17:03 ` [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device Alistair Francis
2018-11-21 18:07 ` Logan Gunthorpe
2018-11-21 18:34 ` Alistair Francis
2018-11-21 19:11 ` Logan Gunthorpe
2018-11-21 21:55 ` Alistair Francis
2018-11-21 22:07 ` Logan Gunthorpe
2018-11-21 22:11 ` Alistair Francis
2018-11-21 22:14 ` Alistair Francis
2018-11-21 22:16 ` Logan Gunthorpe
2018-11-21 22:18 ` Logan Gunthorpe
2018-11-22 10:59 ` [Qemu-devel] [PATCH for-3.2 v7 0/6] Connect a PCIe host and graphics support to RISC-V Andrea Bolognani
2018-11-26 16:03 ` Alistair Francis
2018-11-26 19:34 ` Palmer Dabbelt
2018-11-26 21:33 ` Guenter Roeck
2018-11-27 12:40 ` Andrea Bolognani
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