From: Palmer Dabbelt <palmer@sifive.com>
To: qemu-riscv@nongnu.org
Cc: qemu-devel@nongnu.org, Palmer Dabbelt <palmer@sifive.com>
Subject: [Qemu-devel] [PATCH for-3.2] RISC-V: Deprecate hifive_e and hifive_u machines
Date: Wed, 21 Nov 2018 15:31:23 -0800 [thread overview]
Message-ID: <20181121233123.6408-1-palmer@sifive.com> (raw)
These machines had names that were too general: there are many E
and U machines, and it's easy for users to get confused about which one
is which. The one configuration that can faithfully match an existing
ASIC-based board has been renamed to 'sifive-hifive1', we'll work
through the emulation fidelity issues apparent in the other targets
before adding machines for those.
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
hw/riscv/sifive_e.c | 26 ++++++++++++++++++++++++--
hw/riscv/sifive_u.c | 2 ++
qemu-deprecated.texi | 7 +++++++
3 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index cb513cc3bb50..439d20e0efe7 100644
--- a/hw/riscv/sifive_e.c
+++ b/hw/riscv/sifive_e.c
@@ -95,7 +95,7 @@ static void sifive_mmio_emulate(MemoryRegion *parent, const char *name,
memory_region_add_subregion(parent, offset, mock_mmio);
}
-static void riscv_sifive_e_init(MachineState *machine)
+static void riscv_sifive_hifive1_init(MachineState *machine)
{
const struct MemmapEntry *memmap = sifive_e_memmap;
@@ -135,6 +135,17 @@ static void riscv_sifive_e_init(MachineState *machine)
}
}
+static void riscv_sifive_e_init(MachineState *machine)
+{
+#if defined(TARGET_RISCV32)
+ warn_report("The sifive_e machine is deprecated in favor of sifive-hifive1");
+#else
+ warn_report("The sifive_e machine is deprecated.");
+#endif
+
+ return riscv_sifive_hifive1_init(machine);
+}
+
static void riscv_sifive_e_soc_init(Object *obj)
{
SiFiveESoCState *s = RISCV_E_SOC(obj);
@@ -213,13 +224,24 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp)
static void riscv_sifive_e_machine_init(MachineClass *mc)
{
- mc->desc = "RISC-V Board compatible with SiFive E SDK";
+ mc->desc = "(deprecated) RISC-V Board compatible with SiFive E SDK";
mc->init = riscv_sifive_e_init;
mc->max_cpus = 1;
}
DEFINE_MACHINE("sifive_e", riscv_sifive_e_machine_init)
+#if defined(TARGET_RISCV32)
+static void riscv_sifive_hifive1_machine_init(MachineClass *mc)
+{
+ mc->desc = "SiFive's HiFive1 Development Board";
+ mc->init = riscv_sifive_hifive1_init;
+ mc->max_cpus = 1;
+}
+
+DEFINE_MACHINE("sifive-hifive1", riscv_sifive_hifive1_machine_init)
+#endif
+
static void riscv_sifive_e_soc_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index ef07df244241..0ce6a9dd2609 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -238,6 +238,8 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap,
static void riscv_sifive_u_init(MachineState *machine)
{
+ warn_report("The sifive_u machine is deprecated.");
+
const struct MemmapEntry *memmap = sifive_u_memmap;
SiFiveUState *s = g_new0(SiFiveUState, 1);
diff --git a/qemu-deprecated.texi b/qemu-deprecated.texi
index cb4291f1e5bc..f50696d3dc53 100644
--- a/qemu-deprecated.texi
+++ b/qemu-deprecated.texi
@@ -148,6 +148,13 @@ This machine type uses an unmaintained firmware, broken in lots of ways,
and unable to start post-2004 operating systems. 40p machine type should be
used instead.
+@subsection sifive_e and sifive_u (RISC-V) (since 3.2)
+
+The names for these machine types are a bit too ambiguous. The 32-bit sifive_e
+machine has been replaced by the 'sifive-hifive1' machine, which closely
+matches that hardware. The 'virt' machine type should be used instead of all
+others.
+
@section Device options
@subsection Block device options
--
2.18.1
next reply other threads:[~2018-11-21 23:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-21 23:31 Palmer Dabbelt [this message]
2018-11-22 8:44 ` [Qemu-devel] [PATCH for-3.2] RISC-V: Deprecate hifive_e and hifive_u machines Thomas Huth
2018-11-26 19:17 ` Palmer Dabbelt
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181121233123.6408-1-palmer@sifive.com \
--to=palmer@sifive.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).