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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, ramana.radhakrishnan@arm.com
Subject: [Qemu-devel] [PATCH 12/26] target/arm: Decode PAuth within disas_uncond_b_reg
Date: Fri,  7 Dec 2018 04:36:17 -0600	[thread overview]
Message-ID: <20181207103631.28193-13-richard.henderson@linaro.org> (raw)
In-Reply-To: <20181207103631.28193-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 100 +++++++++++++++++++++++++++++++++++--
 1 file changed, 95 insertions(+), 5 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 5fa2647771..d4df2b48b1 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1982,6 +1982,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
 {
     unsigned int opc, op2, op3, rn, op4;
     TCGv_i64 dst;
+    TCGv_i64 modifier;
 
     opc = extract32(insn, 21, 4);
     op2 = extract32(insn, 16, 5);
@@ -1997,9 +1998,47 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
     case 0: /* BR */
     case 1: /* BLR */
     case 2: /* RET */
-        if (op3 == 0 && op4 == 0) {
+        switch (op3) {
+        case 0:
+            /* BR, BLR, RET */
+            if (op4 != 0) {
+                goto do_unallocated;
+            }
             dst = cpu_reg(s, rn);
-        } else {
+            break;
+
+        case 2:
+        case 3:
+            if (!dc_isar_feature(aa64_pauth, s)) {
+                goto do_unallocated;
+            }
+            if (opc == 2) {
+                /* RETAA, RETAB */
+                if (rn != 0x1f || op4 != 0x1f) {
+                    goto do_unallocated;
+                }
+                rn = 30;
+                modifier = cpu_X[31];
+            } else {
+                /* BRAAZ, BRABZ, BLRAAZ, BLRABZ */
+                if (op4 != 0x1f) {
+                    goto do_unallocated;
+                }
+                modifier = new_tmp_a64_zero(s);
+            }
+            if (s->pauth_active) {
+                dst = new_tmp_a64(s);
+                if (op3 == 2) {
+                    gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier);
+                } else {
+                    gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier);
+                }
+            } else {
+                dst = cpu_reg(s, rn);
+            }
+            break;
+
+        default:
             goto do_unallocated;
         }
         gen_a64_set_pc(s, dst);
@@ -2009,6 +2048,32 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
         }
         break;
 
+    case 8: /* BRAA */
+    case 9: /* BLRAA */
+        if (!dc_isar_feature(aa64_pauth, s)) {
+            goto do_unallocated;
+        }
+        if (op3 != 2 || op3 != 3) {
+            goto do_unallocated;
+        }
+        if (s->pauth_active) {
+            dst = new_tmp_a64(s);
+            modifier = cpu_reg_sp(s, op4);
+            if (op3 == 2) {
+                gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier);
+            } else {
+                gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier);
+            }
+        } else {
+            dst = cpu_reg(s, rn);
+        }
+        gen_a64_set_pc(s, dst);
+        /* BLRAA also needs to load return address */
+        if (opc == 9) {
+            tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
+        }
+        break;
+
     case 4: /* ERET */
         if (s->current_el == 0) {
             goto do_unallocated;
@@ -2016,11 +2081,36 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
         dst = tcg_temp_new_i64();
         tcg_gen_ld_i64(dst, cpu_env,
                        offsetof(CPUARMState, elr_el[s->current_el]));
-        if (op3 == 0 && op4 == 0) {
-            ;
-        } else {
+
+        switch (op3) {
+        case 0: /* ERET */
+            if (op4 != 0) {
+                goto do_unallocated;
+            }
+            break;
+
+        case 2: /* ERETAA */
+        case 3: /* ERETAB */
+            if (!dc_isar_feature(aa64_pauth, s)) {
+                goto do_unallocated;
+            }
+            if (rn != 0x1f || op4 != 0x1f) {
+                goto do_unallocated;
+            }
+            if (s->pauth_active) {
+                modifier = cpu_X[31];
+                if (op3 == 2) {
+                    gen_helper_autia(dst, cpu_env, dst, modifier);
+                } else {
+                    gen_helper_autib(dst, cpu_env, dst, modifier);
+                }
+            }
+            break;
+
+        default:
             goto do_unallocated;
         }
+
         if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
             gen_io_start();
         }
-- 
2.17.2

  parent reply	other threads:[~2018-12-07 10:37 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-07 10:36 [Qemu-devel] [PATCH 00/26] target/arm: Implement ARMv8.3-PAuth Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 01/26] target/arm: Add state for the ARMv8.3-PAuth extension Richard Henderson
2018-12-11 14:50   ` Peter Maydell
2018-12-11 18:07     ` Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 02/26] target/arm: Add SCTLR bits through ARMv8.5 Richard Henderson
2018-12-11 15:18   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 03/26] target/arm: Add PAuth active bit to tbflags Richard Henderson
2018-12-11 15:23   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 04/26] target/arm: Add PAuth helpers Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 05/26] target/arm: Decode PAuth within system hint space Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 06/26] target/arm: Rearrange decode in disas_data_proc_1src Richard Henderson
2018-12-11 15:29   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 07/26] target/arm: Decode PAuth within disas_data_proc_1src Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 08/26] target/arm: Decode PAuth within disas_data_proc_2src Richard Henderson
2018-12-11 15:31   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 09/26] target/arm: Move helper_exception_return to helper-a64.c Richard Henderson
2018-12-11 15:33   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 10/26] target/arm: Add new_pc argument to helper_exception_return Richard Henderson
2018-12-11 15:34   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 11/26] target/arm: Rearrange decode in disas_uncond_b_reg Richard Henderson
2018-12-11 15:40   ` Peter Maydell
2018-12-12 19:20     ` Richard Henderson
2018-12-12 21:18       ` Peter Maydell
2018-12-07 10:36 ` Richard Henderson [this message]
2018-12-07 10:36 ` [Qemu-devel] [PATCH 13/26] target/arm: Decode Load/store register (pac) Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 14/26] target/arm: Move cpu_mmu_index out of line Richard Henderson
2018-12-11 15:41   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 15/26] target/arm: Introduce arm_mmu_idx Richard Henderson
2018-12-11 15:43   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 16/26] target/arm: Create ARMVAParameters and helpers Richard Henderson
2018-12-11 16:40   ` Peter Maydell
2018-12-07 10:36 ` [Qemu-devel] [PATCH 17/26] target/arm: Reuse aa64_va_parameters for setting tbflags Richard Henderson
2018-12-11 16:52   ` Peter Maydell
2018-12-11 18:21     ` Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 18/26] target/arm: Export aa64_va_parameters to internals.h Richard Henderson
2018-12-11 16:53   ` Peter Maydell
2018-12-11 18:23     ` Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 19/26] target/arm: Implement pauth_strip Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 20/26] target/arm: Implement pauth_auth Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 21/26] target/arm: Implement pauth_addpac Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 22/26] target/arm: Implement pauth_computepac Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 23/26] target/arm: Add PAuth system registers Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 24/26] target/arm: Enable PAuth for user-only -cpu max Richard Henderson
2018-12-11 15:45   ` Peter Maydell
2018-12-11 18:24     ` Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 25/26] target/arm: Enable PAuth for user-only, part 2 Richard Henderson
2018-12-07 10:36 ` [Qemu-devel] [PATCH 26/26] target/arm: Tidy TBI handling in gen_a64_set_pc Richard Henderson

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