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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 14/32] tcg/arm: Return false on failure from patch_reloc
Date: Thu, 13 Dec 2018 21:19:05 -0600	[thread overview]
Message-ID: <20181214031923.29527-16-richard.henderson@linaro.org> (raw)
In-Reply-To: <20181214031923.29527-1-richard.henderson@linaro.org>

This does require an extra two checks within the slow paths
to replace the assert that we're moving.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/arm/tcg-target.inc.c | 22 ++++++++++++++++------
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/tcg/arm/tcg-target.inc.c b/tcg/arm/tcg-target.inc.c
index deefa20fbf..49f57d655e 100644
--- a/tcg/arm/tcg-target.inc.c
+++ b/tcg/arm/tcg-target.inc.c
@@ -187,10 +187,14 @@ static const uint8_t tcg_cond_to_arm_cond[] = {
     [TCG_COND_GTU] = COND_HI,
 };
 
-static inline void reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+static inline bool reloc_pc24(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
 {
     ptrdiff_t offset = (tcg_ptr_byte_diff(target, code_ptr) - 8) >> 2;
-    *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
+    if (offset == sextract32(offset, 0, 24)) {
+        *code_ptr = (*code_ptr & ~0xffffff) | (offset & 0xffffff);
+        return true;
+    }
+    return false;
 }
 
 static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
@@ -199,7 +203,7 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
     tcg_debug_assert(addend == 0);
 
     if (type == R_ARM_PC24) {
-        reloc_pc24(code_ptr, (tcg_insn_unit *)value);
+        return reloc_pc24(code_ptr, (tcg_insn_unit *)value);
     } else if (type == R_ARM_PC13) {
         intptr_t diff = value - (uintptr_t)(code_ptr + 2);
         tcg_insn_unit insn = *code_ptr;
@@ -213,7 +217,11 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
         } else {
             int rd = extract32(insn, 12, 4);
             int rt = rd == TCG_REG_PC ? TCG_REG_TMP : rd;
-            assert(diff >= 0x1000 && diff < 0x100000);
+
+            if (diff < 0x1000 || diff >= 0x100000) {
+                return false;
+            }
+
             /* add rt, pc, #high */
             *code_ptr++ = ((insn & 0xf0000000) | (1 << 25) | ARITH_ADD
                            | (TCG_REG_PC << 16) | (rt << 12)
@@ -1372,7 +1380,8 @@ static void tcg_out_qemu_ld_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
     TCGMemOp opc = get_memop(oi);
     void *func;
 
-    reloc_pc24(lb->label_ptr[0], s->code_ptr);
+    bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr);
+    tcg_debug_assert(ok);
 
     argreg = tcg_out_arg_reg32(s, TCG_REG_R0, TCG_AREG0);
     if (TARGET_LONG_BITS == 64) {
@@ -1432,7 +1441,8 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *lb)
     TCGMemOpIdx oi = lb->oi;
     TCGMemOp opc = get_memop(oi);
 
-    reloc_pc24(lb->label_ptr[0], s->code_ptr);
+    bool ok = reloc_pc24(lb->label_ptr[0], s->code_ptr);
+    tcg_debug_assert(ok);
 
     argreg = TCG_REG_R0;
     argreg = tcg_out_arg_reg32(s, argreg, TCG_AREG0);
-- 
2.17.2

  parent reply	other threads:[~2018-12-14  3:19 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-14  3:18 [Qemu-devel] [PULL 00/32] tcg patch queue Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PATCH] fixup! target/arm: Move id_aa64mmfr* to ARMISARegisters Richard Henderson
2018-12-14  3:23   ` Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 01/32] tcg/i386: Always use %ebp for TCG_AREG0 Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 02/32] tcg/i386: Move TCG_REG_CALL_STACK from define to enum Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 03/32] tcg/aarch64: Remove reloc_pc26_atomic Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 04/32] tcg/aarch64: Fold away "noaddr" branch routines Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 05/32] tcg/arm: Remove reloc_pc24_atomic Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 06/32] tcg/arm: Fold away "noaddr" branch routines Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 07/32] tcg/ppc: " Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 08/32] tcg/s390: Remove retranslation code Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 09/32] tcg/sparc: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 10/32] tcg/mips: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 11/32] tcg: Return success from patch_reloc Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 12/32] tcg/i386: Return false on failure " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 13/32] tcg/aarch64: " Richard Henderson
2018-12-14  3:19 ` Richard Henderson [this message]
2018-12-14  3:19 ` [Qemu-devel] [PULL 15/32] tcg/ppc: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 16/32] tcg/s390x: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 17/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 18/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 19/32] tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 20/32] tcg/i386: Assume 32-bit values are zero-extended Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 21/32] tcg/i386: Precompute all guest_base parameters Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 22/32] tcg/i386: Add setup_guest_base_seg for FreeBSD Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 23/32] tcg: Clean up generic bswap32 Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 24/32] tcg: Clean up generic bswap64 Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 25/32] tcg/optimize: Optimize bswap Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 26/32] tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 27/32] tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 28/32] tcg: Drop nargs from tcg_op_insert_{before, after} Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 29/32] qht-bench: document -p flag Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 30/32] exec: introduce qemu_xxhash{2,4,5,6,7} Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 31/32] include: move exec/tb-hash-xx.h to qemu/xxhash.h Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 32/32] xxhash: match output against the original xxhash32 Richard Henderson
2018-12-15 21:18 ` [Qemu-devel] [PULL 00/32] tcg patch queue Peter Maydell
2018-12-16  7:02   ` Richard Henderson
2018-12-16 12:43     ` Peter Maydell
2018-12-16 20:11       ` Richard Henderson
2018-12-16 21:14         ` Peter Maydell

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