qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 21/32] tcg/i386: Precompute all guest_base parameters
Date: Thu, 13 Dec 2018 21:19:12 -0600	[thread overview]
Message-ID: <20181214031923.29527-23-richard.henderson@linaro.org> (raw)
In-Reply-To: <20181214031923.29527-1-richard.henderson@linaro.org>

These values are constant between all qemu_ld/st invocations;
there is no need to figure this out each time.  If we cannot
use a segment or an offset directly for guest_base, load the
value into a register in the prologue.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/i386/tcg-target.inc.c | 101 +++++++++++++++-----------------------
 1 file changed, 40 insertions(+), 61 deletions(-)

diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.c
index f7b548545a..3fb2f4b971 100644
--- a/tcg/i386/tcg-target.inc.c
+++ b/tcg/i386/tcg-target.inc.c
@@ -1857,22 +1857,31 @@ static void tcg_out_qemu_st_slow_path(TCGContext *s, TCGLabelQemuLdst *l)
     tcg_out_push(s, retaddr);
     tcg_out_jmp(s, qemu_st_helpers[opc & (MO_BSWAP | MO_SIZE)]);
 }
-#elif defined(__x86_64__) && defined(__linux__)
-# include <asm/prctl.h>
-# include <sys/prctl.h>
-
+#elif TCG_TARGET_REG_BITS == 32
+# define x86_guest_base_seg     0
+# define x86_guest_base_index   -1
+# define x86_guest_base_offset  guest_base
+#else
+static int x86_guest_base_seg;
+static int x86_guest_base_index = -1;
+static int32_t x86_guest_base_offset;
+# if defined(__x86_64__) && defined(__linux__)
+#  include <asm/prctl.h>
+#  include <sys/prctl.h>
 int arch_prctl(int code, unsigned long addr);
-
-static int guest_base_flags;
-static inline void setup_guest_base_seg(void)
+static inline int setup_guest_base_seg(void)
 {
     if (arch_prctl(ARCH_SET_GS, guest_base) == 0) {
-        guest_base_flags = P_GS;
+        return P_GS;
     }
+    return 0;
 }
-#else
-# define guest_base_flags 0
-static inline void setup_guest_base_seg(void) { }
+# else
+static inline int setup_guest_base_seg(void)
+{
+    return 0;
+}
+# endif
 #endif /* SOFTMMU */
 
 static void tcg_out_qemu_ld_direct(TCGContext *s, TCGReg datalo, TCGReg datahi,
@@ -2011,27 +2020,9 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
     add_qemu_ldst_label(s, true, is64, oi, datalo, datahi, addrlo, addrhi,
                         s->code_ptr, label_ptr);
 #else
-    {
-        int32_t offset = guest_base;
-        int index = -1;
-        int seg = 0;
-
-        /*
-         * Recall we store 32-bit values zero-extended.  No need for
-         * further manual extension or an addr32 (0x67) prefix.
-         */
-        if (guest_base == 0 || guest_base_flags) {
-            seg = guest_base_flags;
-            offset = 0;
-        } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
-            tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
-            index = TCG_REG_L1;
-            offset = 0;
-        }
-
-        tcg_out_qemu_ld_direct(s, datalo, datahi,
-                               addrlo, index, offset, seg, is64, opc);
-    }
+    tcg_out_qemu_ld_direct(s, datalo, datahi, addrlo, x86_guest_base_index,
+                           x86_guest_base_offset, x86_guest_base_seg,
+                           is64, opc);
 #endif
 }
 
@@ -2147,28 +2138,8 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
     add_qemu_ldst_label(s, false, is64, oi, datalo, datahi, addrlo, addrhi,
                         s->code_ptr, label_ptr);
 #else
-    {
-        int32_t offset = guest_base;
-        int index = -1;
-        int seg = 0;
-
-        /*
-         * Recall we store 32-bit values zero-extended.  No need for
-         * further manual extension or an addr32 (0x67) prefix.
-         */
-        if (guest_base == 0 || guest_base_flags) {
-            seg = guest_base_flags;
-            offset = 0;
-        } else if (TCG_TARGET_REG_BITS == 64 && offset != guest_base) {
-            /* ??? Note that we require L0 free for bswap.  */
-            tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_L1, guest_base);
-            index = TCG_REG_L1;
-            offset = 0;
-        }
-
-        tcg_out_qemu_st_direct(s, datalo, datahi,
-                               addrlo, index, offset, seg, opc);
-    }
+    tcg_out_qemu_st_direct(s, datalo, datahi, addrlo, x86_guest_base_index,
+                           x86_guest_base_offset, x86_guest_base_seg, opc);
 #endif
 }
 
@@ -3415,6 +3386,21 @@ static void tcg_target_qemu_prologue(TCGContext *s)
 		         (ARRAY_SIZE(tcg_target_callee_save_regs) + 2) * 4
 			 + stack_addend);
 #else
+# if !defined(CONFIG_SOFTMMU) && TCG_TARGET_REG_BITS == 64
+    if (guest_base) {
+        int seg = setup_guest_base_seg();
+        if (seg != 0) {
+            x86_guest_base_seg = seg;
+        } else if (guest_base == (int32_t)guest_base) {
+            x86_guest_base_offset = guest_base;
+        } else {
+            /* Choose R12 because, as a base, it requires a SIB byte. */
+            x86_guest_base_index = TCG_REG_R12;
+            tcg_out_mov(s, TCG_TYPE_PTR, x86_guest_base_index, guest_base);
+            tcg_regset_set_reg(s->reserved_regs, x86_guest_base_index);
+        }
+    }
+# endif
     tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]);
     tcg_out_addi(s, TCG_REG_ESP, -stack_addend);
     /* jmp *tb.  */
@@ -3440,13 +3426,6 @@ static void tcg_target_qemu_prologue(TCGContext *s)
         tcg_out_pop(s, tcg_target_callee_save_regs[i]);
     }
     tcg_out_opc(s, OPC_RET, 0, 0, 0);
-
-#if !defined(CONFIG_SOFTMMU)
-    /* Try to set up a segment register to point to guest_base.  */
-    if (guest_base) {
-        setup_guest_base_seg();
-    }
-#endif
 }
 
 static void tcg_out_nop_fill(tcg_insn_unit *p, int count)
-- 
2.17.2

  parent reply	other threads:[~2018-12-14  3:20 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-14  3:18 [Qemu-devel] [PULL 00/32] tcg patch queue Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PATCH] fixup! target/arm: Move id_aa64mmfr* to ARMISARegisters Richard Henderson
2018-12-14  3:23   ` Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 01/32] tcg/i386: Always use %ebp for TCG_AREG0 Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 02/32] tcg/i386: Move TCG_REG_CALL_STACK from define to enum Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 03/32] tcg/aarch64: Remove reloc_pc26_atomic Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 04/32] tcg/aarch64: Fold away "noaddr" branch routines Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 05/32] tcg/arm: Remove reloc_pc24_atomic Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 06/32] tcg/arm: Fold away "noaddr" branch routines Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 07/32] tcg/ppc: " Richard Henderson
2018-12-14  3:18 ` [Qemu-devel] [PULL 08/32] tcg/s390: Remove retranslation code Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 09/32] tcg/sparc: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 10/32] tcg/mips: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 11/32] tcg: Return success from patch_reloc Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 12/32] tcg/i386: Return false on failure " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 13/32] tcg/aarch64: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 14/32] tcg/arm: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 15/32] tcg/ppc: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 16/32] tcg/s390x: " Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 17/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 18/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 19/32] tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 20/32] tcg/i386: Assume 32-bit values are zero-extended Richard Henderson
2018-12-14  3:19 ` Richard Henderson [this message]
2018-12-14  3:19 ` [Qemu-devel] [PULL 22/32] tcg/i386: Add setup_guest_base_seg for FreeBSD Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 23/32] tcg: Clean up generic bswap32 Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 24/32] tcg: Clean up generic bswap64 Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 25/32] tcg/optimize: Optimize bswap Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 26/32] tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 27/32] tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 28/32] tcg: Drop nargs from tcg_op_insert_{before, after} Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 29/32] qht-bench: document -p flag Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 30/32] exec: introduce qemu_xxhash{2,4,5,6,7} Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 31/32] include: move exec/tb-hash-xx.h to qemu/xxhash.h Richard Henderson
2018-12-14  3:19 ` [Qemu-devel] [PULL 32/32] xxhash: match output against the original xxhash32 Richard Henderson
2018-12-15 21:18 ` [Qemu-devel] [PULL 00/32] tcg patch queue Peter Maydell
2018-12-16  7:02   ` Richard Henderson
2018-12-16 12:43     ` Peter Maydell
2018-12-16 20:11       ` Richard Henderson
2018-12-16 21:14         ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20181214031923.29527-23-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).