From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 04/32] tcg/aarch64: Fold away "noaddr" branch routines
Date: Thu, 13 Dec 2018 21:18:55 -0600 [thread overview]
Message-ID: <20181214031923.29527-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20181214031923.29527-1-richard.henderson@linaro.org>
There are one use apiece for these. There is no longer a need for
preserving branch offset operands, as we no longer re-translate.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/aarch64/tcg-target.inc.c | 21 ++-------------------
1 file changed, 2 insertions(+), 19 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index a41b633960..28de0226fb 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -1129,23 +1129,6 @@ static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target)
}
}
-static inline void tcg_out_goto_noaddr(TCGContext *s)
-{
- /* We pay attention here to not modify the branch target by reading from
- the buffer. This ensure that caches and memory are kept coherent during
- retranslation. Mask away possible garbage in the high bits for the
- first translation, while keeping the offset bits for retranslation. */
- uint32_t old = tcg_in32(s);
- tcg_out_insn(s, 3206, B, old);
-}
-
-static inline void tcg_out_goto_cond_noaddr(TCGContext *s, TCGCond c)
-{
- /* See comments in tcg_out_goto_noaddr. */
- uint32_t old = tcg_in32(s) >> 5;
- tcg_out_insn(s, 3202, B_C, c, old);
-}
-
static inline void tcg_out_callr(TCGContext *s, TCGReg reg)
{
tcg_out_insn(s, 3207, BLR, reg);
@@ -1192,7 +1175,7 @@ static inline void tcg_out_goto_label(TCGContext *s, TCGLabel *l)
{
if (!l->has_value) {
tcg_out_reloc(s, s->code_ptr, R_AARCH64_JUMP26, l, 0);
- tcg_out_goto_noaddr(s);
+ tcg_out_insn(s, 3206, B, 0);
} else {
tcg_out_goto(s, l->u.value_ptr);
}
@@ -1523,7 +1506,7 @@ static void tcg_out_tlb_read(TCGContext *s, TCGReg addr_reg, TCGMemOp opc,
/* If not equal, we jump to the slow path. */
*label_ptr = s->code_ptr;
- tcg_out_goto_cond_noaddr(s, TCG_COND_NE);
+ tcg_out_insn(s, 3202, B_C, TCG_COND_NE, 0);
}
#endif /* CONFIG_SOFTMMU */
--
2.17.2
next prev parent reply other threads:[~2018-12-14 3:19 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-14 3:18 [Qemu-devel] [PULL 00/32] tcg patch queue Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PATCH] fixup! target/arm: Move id_aa64mmfr* to ARMISARegisters Richard Henderson
2018-12-14 3:23 ` Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PULL 01/32] tcg/i386: Always use %ebp for TCG_AREG0 Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PULL 02/32] tcg/i386: Move TCG_REG_CALL_STACK from define to enum Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PULL 03/32] tcg/aarch64: Remove reloc_pc26_atomic Richard Henderson
2018-12-14 3:18 ` Richard Henderson [this message]
2018-12-14 3:18 ` [Qemu-devel] [PULL 05/32] tcg/arm: Remove reloc_pc24_atomic Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PULL 06/32] tcg/arm: Fold away "noaddr" branch routines Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PULL 07/32] tcg/ppc: " Richard Henderson
2018-12-14 3:18 ` [Qemu-devel] [PULL 08/32] tcg/s390: Remove retranslation code Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 09/32] tcg/sparc: " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 10/32] tcg/mips: " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 11/32] tcg: Return success from patch_reloc Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 12/32] tcg/i386: Return false on failure " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 13/32] tcg/aarch64: " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 14/32] tcg/arm: " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 15/32] tcg/ppc: " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 16/32] tcg/s390x: " Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 17/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 18/32] tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 19/32] tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 20/32] tcg/i386: Assume 32-bit values are zero-extended Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 21/32] tcg/i386: Precompute all guest_base parameters Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 22/32] tcg/i386: Add setup_guest_base_seg for FreeBSD Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 23/32] tcg: Clean up generic bswap32 Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 24/32] tcg: Clean up generic bswap64 Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 25/32] tcg/optimize: Optimize bswap Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 26/32] tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 27/32] tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 28/32] tcg: Drop nargs from tcg_op_insert_{before, after} Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 29/32] qht-bench: document -p flag Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 30/32] exec: introduce qemu_xxhash{2,4,5,6,7} Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 31/32] include: move exec/tb-hash-xx.h to qemu/xxhash.h Richard Henderson
2018-12-14 3:19 ` [Qemu-devel] [PULL 32/32] xxhash: match output against the original xxhash32 Richard Henderson
2018-12-15 21:18 ` [Qemu-devel] [PULL 00/32] tcg patch queue Peter Maydell
2018-12-16 7:02 ` Richard Henderson
2018-12-16 12:43 ` Peter Maydell
2018-12-16 20:11 ` Richard Henderson
2018-12-16 21:14 ` Peter Maydell
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