From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
gkurz@kaod.org, Laurent Vivier <lvivier@redhat.com>,
spopovyc@redhat.com, qemu-ppc <qemu-ppc@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PULL 00/27] ppc-for-4.0 queue 20181213
Date: Mon, 17 Dec 2018 12:03:44 +1100 [thread overview]
Message-ID: <20181217010344.GA5597@umbus.fritz.box> (raw)
In-Reply-To: <950689dd-1946-a42f-6a68-2944b46d53fc@kaod.org>
[-- Attachment #1: Type: text/plain, Size: 15657 bytes --]
On Fri, Dec 14, 2018 at 06:49:55PM +0100, Cédric Le Goater wrote:
> On 12/14/18 5:03 PM, Peter Maydell wrote:
> > On Thu, 13 Dec 2018 at 04:01, David Gibson <david@gibson.dropbear.id.au> wrote:
> >>
> >> The following changes since commit 4b3aab204204ca742836219b97b538d90584f4f2:
> >>
> >> Merge remote-tracking branch 'remotes/vivier2/tags/trivial-patches-pull-request' into staging (2018-12-11 22:26:44 +0000)
> >>
> >> are available in the Git repository at:
> >>
> >> git://github.com/dgibson/qemu.git tags/ppc-for-4.0-20181213
> >>
> >> for you to fetch changes up to 67888a17b6683600ae3fa64ca275c737ba8a9a45:
> >>
> >> spapr/xive: use the VCPU id as a NVT identifier (2018-12-13 09:44:04 +1100)
> >>
> >> ----------------------------------------------------------------
> >> ppc patch queue 2018-12-13
> >>
> >> Here's the first ppc and spapr pull request for 4.0. Highlights are:
> >>
> >> * The start of support for the POWER9 "XIVE" interrupt controller
> >> (not complete enough to use yet, but we're getting there)
> >> * A number of g_new vs. g_malloc cleanups
> >> * Some IRQ wiring cleanups
> >> * A fix for how we advertise NUMA nodes to the guest for pseries
> >>
> >> ---------------------------------------------------------------
> >
> >
> > Compile errors in the windows cross-build.
>
> are you compiling with the mingw64-* packages ? as documented in :
>
> https://wiki.qemu.org/Hosts/W32
>
> > These look like
> > they're assumptions that "long" is 64 bits, which it is not on Windows.
> > For instance the PPC_BIT macro should be using the ULL suffix, not UL
> > ("UL" is almost always a bug: either the constant is 32-bit, in
> > which case "U" is what you want, or it's 64-bit and you need "ULL").
>
> ok. These definitions come from our skiboot firmware which I wanted
> to keep as it was. It seems I will need to adapt.
>
> > Using __builtin_ffsl() directly in target/ppc/cpu.h also looks
> > a bit dubious -- this should be rephrased to use ctz32() or ctz64()
> > instead.
>
> ok. I will work on a fix.
So, I tried to confirm the problem, before applying Cédric's fix, but
I don't seem to be able to. I'm getting a bunch of failures in the
windows cross-build on master, which look like gcc8 problems - but
nothing new or different in my tree.
$ ./configure --cross-prefix=i686-w64-mingw32-
[...]
$ make -k
CHK version_gen.h
CC block/sheepdog.o
block/sheepdog.c: In function 'find_vdi_name':
block/sheepdog.c:1239:5: error: 'strncpy' specified bound 256 equals destination size [-Werror=stringop-truncation]
strncpy(buf + SD_MAX_VDI_LEN, tag, SD_MAX_VDI_TAG_LEN);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make: *** [/home/dwg/src/qemu/rules.mak:69: block/sheepdog.o] Error 1
CC hw/acpi/core.o
In function 'acpi_table_install',
inlined from 'acpi_table_add' at hw/acpi/core.c:296:5:
hw/acpi/core.c:184:9: error: 'strncpy' specified bound 4 equals destination size [-Werror=stringop-truncation]
strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
hw/acpi/core.c:203:9: error: 'strncpy' specified bound 6 equals destination size [-Werror=stringop-truncation]
strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
hw/acpi/core.c:207:9: error: 'strncpy' specified bound 8 equals destination size [-Werror=stringop-truncation]
strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sizeof ext_hdr->oem_table_id);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
hw/acpi/core.c:216:9: error: 'strncpy' specified bound 4 equals destination size [-Werror=stringop-truncation]
strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sizeof ext_hdr->asl_compiler_id);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make: *** [/home/dwg/src/qemu/rules.mak:69: hw/acpi/core.o] Error 1
CC hw/acpi/aml-build.o
hw/acpi/aml-build.c: In function 'build_header':
hw/acpi/aml-build.c:1535:9: error: 'strncpy' specified bound 6 equals destination size [-Werror=stringop-truncation]
strncpy((char *)h->oem_id, oem_id, sizeof h->oem_id);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
hw/acpi/aml-build.c:1541:9: error: 'strncpy' specified bound 8 equals destination size [-Werror=stringop-truncation]
strncpy((char *)h->oem_table_id, oem_table_id, sizeof(h->oem_table_id));
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make: *** [/home/dwg/src/qemu/rules.mak:69: hw/acpi/aml-build.o] Error 1
CC migration/global_state.o
migration/global_state.c: In function 'global_state_store_running':
migration/global_state.c:45:5: error: 'strncpy' specified bound 100 equals destination size [-Werror=stringop-truncation]
strncpy((char *)global_state.runstate,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
state, sizeof(global_state.runstate));
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make: *** [/home/dwg/src/qemu/rules.mak:69: migration/global_state.o] Error 1
make: Target 'all' not remade because of errors.
>
> Thanks,
>
> C.
>
>
> > In file included from /home/petmay01/qemu-for-merges/hw/intc/xive.c:13:0:
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c: In function 'xive_router_notify':
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:76:33: error: overflow
> > in implicit constant conversion [-Werror=overflow]
> > #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:84:50: note: in
> > definition of macro 'MASK_TO_LSH'
> > # define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1)
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1366:28: note: in
> > expansion of macro 'GETFIELD_BE64'
> > GETFIELD_BE64(EAS_END_BLOCK, eas.w),
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:120:25:
> > note: in expansion of macro 'PPC_BITMASK'
> > #define EAS_END_BLOCK PPC_BITMASK(4, 7) /* Destination END block# */
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1366:42: note: in
> > expansion of macro 'EAS_END_BLOCK'
> > GETFIELD_BE64(EAS_END_BLOCK, eas.w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:89:46: error: right
> > shift count is negative [-Werror=shift-count-negative]
> > #define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1366:28: note: in
> > expansion of macro 'GETFIELD_BE64'
> > GETFIELD_BE64(EAS_END_BLOCK, eas.w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:76:33: error: overflow
> > in implicit constant conversion [-Werror=overflow]
> > #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:84:50: note: in
> > definition of macro 'MASK_TO_LSH'
> > # define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1)
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1367:28: note: in
> > expansion of macro 'GETFIELD_BE64'
> > GETFIELD_BE64(EAS_END_INDEX, eas.w),
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:121:25:
> > note: in expansion of macro 'PPC_BITMASK'
> > #define EAS_END_INDEX PPC_BITMASK(8, 31) /* Destination END index */
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1367:42: note: in
> > expansion of macro 'EAS_END_INDEX'
> > GETFIELD_BE64(EAS_END_INDEX, eas.w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:89:46: error: right
> > shift count is negative [-Werror=shift-count-negative]
> > #define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1367:28: note: in
> > expansion of macro 'GETFIELD_BE64'
> > GETFIELD_BE64(EAS_END_INDEX, eas.w),
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c: In function
> > 'xive_eas_pic_print_info':
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:76:33: error: overflow
> > in implicit constant conversion [-Werror=overflow]
> > #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:84:50: note: in
> > definition of macro 'MASK_TO_LSH'
> > # define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1)
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1400:31: note: in
> > expansion of macro 'GETFIELD_BE64'
> > (uint8_t) GETFIELD_BE64(EAS_END_BLOCK, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:120:25:
> > note: in expansion of macro 'PPC_BITMASK'
> > #define EAS_END_BLOCK PPC_BITMASK(4, 7) /* Destination END block# */
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1400:45: note: in
> > expansion of macro 'EAS_END_BLOCK'
> > (uint8_t) GETFIELD_BE64(EAS_END_BLOCK, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:89:46: error: right
> > shift count is negative [-Werror=shift-count-negative]
> > #define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1400:31: note: in
> > expansion of macro 'GETFIELD_BE64'
> > (uint8_t) GETFIELD_BE64(EAS_END_BLOCK, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:120:25:
> > note: in expansion of macro 'PPC_BITMASK'
> > #define EAS_END_BLOCK PPC_BITMASK(4, 7) /* Destination END block# */
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1400:45: note: in
> > expansion of macro 'EAS_END_BLOCK'
> > (uint8_t) GETFIELD_BE64(EAS_END_BLOCK, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:89:46: error: right
> > shift count is negative [-Werror=shift-count-negative]
> > #define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1400:31: note: in
> > expansion of macro 'GETFIELD_BE64'
> > (uint8_t) GETFIELD_BE64(EAS_END_BLOCK, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:76:33: error: overflow
> > in implicit constant conversion [-Werror=overflow]
> > #define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:84:50: note: in
> > definition of macro 'MASK_TO_LSH'
> > # define MASK_TO_LSH(m) (__builtin_ffsl(m) - 1)
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1401:31: note: in
> > expansion of macro 'GETFIELD_BE64'
> > (uint32_t) GETFIELD_BE64(EAS_END_INDEX, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:121:25:
> > note: in expansion of macro 'PPC_BITMASK'
> > #define EAS_END_INDEX PPC_BITMASK(8, 31) /* Destination END index */
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1401:45: note: in
> > expansion of macro 'EAS_END_INDEX'
> > (uint32_t) GETFIELD_BE64(EAS_END_INDEX, eas->w),
> > ^
> > /home/petmay01/qemu-for-merges/target/ppc/cpu.h:89:46: error: right
> > shift count is negative [-Werror=shift-count-negative]
> > #define GETFIELD(m, v) (((v) & (m)) >> MASK_TO_LSH(m))
> > ^
> > /home/petmay01/qemu-for-merges/include/hw/ppc/xive_regs.h:129:34:
> > note: in expansion of macro 'GETFIELD'
> > #define GETFIELD_BE64(m, v) GETFIELD(m, be64_to_cpu(v))
> > ^
> > /home/petmay01/qemu-for-merges/hw/intc/xive.c:1401:31: note: in
> > expansion of macro 'GETFIELD_BE64'
> > (uint32_t) GETFIELD_BE64(EAS_END_INDEX, eas->w),
> > ^
> >
> >
> > thanks
> > -- PMM
> >
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2018-12-17 3:31 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-13 4:00 [Qemu-devel] [PULL 00/27] ppc-for-4.0 queue 20181213 David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 01/27] spapr: Fix ibm, max-associativity-domains property number of nodes David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 02/27] target/ppc: tcg: Implement addex instruction David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 03/27] spapr: drop redundant statement in spapr_populate_drconf_memory() David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 04/27] target/ppc: use g_new(T, n) instead of g_malloc(sizeof(T) * n) David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 05/27] spapr: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 06/27] ppc405_boards: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 07/27] ppc405_uc: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 08/27] ppc440_bamboo: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 09/27] sam460ex: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 10/27] virtex_ml507: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 11/27] mac_newworld: simplify IRQ wiring David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 12/27] e500: " David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 13/27] ppc/xive: introduce a XIVE interrupt source model David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 14/27] ppc/xive: add support for the LSI interrupt sources David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 15/27] ppc/xive: introduce the XiveNotifier interface David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 16/27] ppc/xive: introduce the XiveRouter model David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 17/27] ppc/xive: introduce the XIVE Event Notification Descriptors David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 18/27] spapr: initialize VSMT before initializing the IRQ backend David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 19/27] spapr: introduce a spapr_irq_init() routine David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 20/27] spapr: export and rename the xics_max_server_number() routine David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 21/27] Changes requirement for "vsubsbs" instruction David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 22/27] ppc/xive: add support for the END Event State Buffers David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 23/27] ppc/xive: introduce the XIVE interrupt thread context David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 24/27] ppc/xive: introduce a simplified XIVE presenter David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 25/27] ppc/xive: notify the CPU when the interrupt priority is more privileged David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 26/27] spapr/xive: introduce a XIVE interrupt controller David Gibson
2018-12-13 4:01 ` [Qemu-devel] [PULL 27/27] spapr/xive: use the VCPU id as a NVT identifier David Gibson
2018-12-13 7:43 ` [Qemu-devel] [PULL 00/27] ppc-for-4.0 queue 20181213 no-reply
2018-12-13 12:08 ` David Gibson
2018-12-13 12:57 ` Cédric Le Goater
2018-12-14 16:03 ` Peter Maydell
2018-12-14 17:49 ` Cédric Le Goater
2018-12-17 1:03 ` David Gibson [this message]
2018-12-17 7:41 ` [Qemu-devel] [Qemu-ppc] " Howard Spoelstra
2018-12-17 8:04 ` [Qemu-devel] " Cédric Le Goater
2018-12-17 10:11 ` Cédric Le Goater
2018-12-15 9:09 ` David Gibson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181217010344.GA5597@umbus.fritz.box \
--to=david@gibson.dropbear.id.au \
--cc=clg@kaod.org \
--cc=gkurz@kaod.org \
--cc=lvivier@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=spopovyc@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).